Vivek K.

Experience

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  Magnetic Marelli Powertrain India Private Limited

  Jun 2018 - Jul 2018

  Internship Trainee

  Training in Project Department, worked on WCM(World Class Manufacturing) concept for Mahindra AMT Line Project.On behalf of M/s Ramani Precision Machines Private Limited.

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  JBM Group

  Jul 2019 - Aug 2022

  Project Executive

  1. Working for New projects and infrastructure development. 2. Responsible for utility project to meet the requirements of new plants, expansion, capacity up, shifting of utilities & equipment related to : a) Mechanical: Compressor, HVAC, VRV System, Chillers, Fire protection system (Jockey, Diesel & Electric pump), Goods Lift – 3Ton, Material Handling Equipment. b) Electrical: Transformers, HT & LT Panels, DB panels, Cabling and Lighting, UPS upto 500 KVA, DG Set Upto 625Kva. c) Waste Water treatment system : ETP, WTP, STP d) Goods Lift/Elevators & Interior work.3. HVAC Engineer with industrial experience in Project Detailed Design & Engineering, Equipment Selection, Bill of Quantity preparation, and Engineering Estimation with comprehensive knowledge of HVAC equipment like Chillers, AHU’s, Heat Pumps, and Multifunction Units Etc.4. Industrial project management enabling Cost and schedule control. Capable to deliver the projects on time, new vendor development & project management as per business need.5. An integral part of handling the tendering, procurement, negotiation, evaluation of design & drawings, installation & commissioning of mechanical (HVAC, fire & Piping) & Electrical projects for new plants.6. Executing various projects for different plants, pumping stations, Multiple offices, Quality labs, Stores, warehouses facilities like Piping, Air-cooling, Fire protection, ventilation, Air conditioning, Electrical systems, etc.7. Experience with SAP. Dealing with the Commercial of the projects like PO release, billing, payment, and reconciliation of the project to enable cost control. 8. Hands-on experience with mechanical systems including high and Low-pressure water, compressed air pneumatics, and hydraulics. Sound familiarity with fittings valves pumps and in-line components Show less

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  CSIR-CEERI

  Jan 2023 - Jan 2023

  Apprentice

  It is SHILP (Semiconductor High-Impact Learning Program) at CSIR-CEERI, Pilani. In this training, I have worked on semiconductor manufacturing and exploring the fabrication process on a wafer for making of number of devices(As per require Design). The Devices can be PN Junction, MOSFETS, CMOS, etc.There are many process for transform wafer into devices, the most common processes are-1. Cleaning of Wafer's by using (Organic & Inorganic) Chemicals2. Growing of Silicon Dioxide on Silicon wafer's.3. Lithography4. Doping 5. Mask Allignment6. Different Levels of Lithography7. Photoresist Removal8. Dicing of Wafer's9. Characterization 10. PackagingAfter these processes now our devices are ready to use. Show less

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  Entuple Technologies Pvt. Ltd.

  Jun 2023 - Jul 2023

  Summer Internship

  Summer training in VLSI Backend domain on Software Cadence Virtuoso. This course teaches the basic and advanced techniques for designing and implementing custom physical circuits using the Cadence tool suite. The course covers the following topics:Introduction to VLSI fundamentals, such as logic gates, combinational and sequential circuits, synthesis, and verification.Introduction to Cadence virtuoso environment, such as schematic editor, layout editor, simulation tools, and design rule checking.Back end design using Cadence encounter tool, such as floor-planning, power-planning, placement, routing, clock tree synthesis, timing analysis, and power analysis.Physical implementation of a simplified microprocessor using Cadence tools, such as netlist generation, IO pad insertion, layout generation, parasitic extraction, and post-layout simulation.The course is designed for students who have a basic knowledge of digital design and want to learn how to use Cadence Virtuoso tools for VLSI Backend Design. The course also prepares the students for the industry standards and challenges in VLSI physical design & erification. Show less