Xiaoxue Zhang

Experience

• 

  Nanyang Technological University

  Sept 2012 - Dec 2012

  Design and Implementation of an image processing system on FPGA

  Image filtering plays an important role in image processing. This work proposes median filter implementations on a Xilinx Spartan XC3S500E-3E field programmable gate array (FPGA) chip.FPGA devices are capable and efficient of performing image data in parallel. In this work, some common image processing functions are to be coded in Verilog HDL and simulated with FPGA design tools. The functionalities and performance factors such as size and speed are to be evaluated.

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  Marvell Semiconductor

  Jul 2013 - Jun 2017

  Analog Design Engineer II

  1) Established Marvell's high speed IO(input-output) Pads based on 16nm technology 2) Designed Marvell's first Low Power and High performance IO library . 3) Largely improved 28nm IO pads libraries's high speed performance .4) Managed muti-projects simultaneously 5) Instructed and mentored 4~5 layouters

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  701Search Pte Ltd （Telenor Group）

  Jun 2017 - Dec 2017

  Data Scientist

  • Built user-level marketing models in e-commerce domain• Analysed online user behaviour and predicted retention rate• Developed production-grade models & algorithms using R, Python and AWS

• 

  Baidu, Inc.

  Aug 2018 - now

  Senior R&D Engineer（algorithms）

  1. Developed advanced algorithms on content to deliver the insight., such as recognize clickbait based on ERNIE pre-trained model with 90% precision /recall2.Analyzed and processed complex data sets using advanced querying, visualization and analytics tools.3.Applied various model to improve recommendation performance