Deep Enrich
Aditya J.
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Germany
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About me
MSc Microsystems Engg | Universität Freiburg | x-associate engineer @ R&D - Rossell Techsys | FPGAs
Education
GEMS Education
2005 - 2018Primary, Middle and High School Science Stream - PCM+Engineering DesignActivities and Societies: School Head Boy Senior School Prefect Studied in Our Own English High School, Al Ain, Abu Dhabi. This institution has given me a concrete foundation to achieve life goals. I will always cherish the memories of 13 years of excellent education and teachings from this school.
The University of Freiburg
2024 -Masters Microsystems engineering
Ramaiah Institute Of Technology
2018 - 2022Bachelor of Engineering - BE Electrical, Electronics and Communications Engineering
Experience
STARDUST_RIT
Oct 2019 - Jul 2021Implemented managerial strategies and structured processes to effectively accomplish team objectives. Chief System Engineer for the Grounds and Communication Subsystem.
Project Manager
Dec 2020 - Jul 2021Cheif System Engineer
Oct 2019 - Dec 2020
.webp)
Society for Space Education Research and Development (SSERD)
Mar 2021 - Jul 2021Directed and provided guidance to an international student team in the development of a Cube Satellite. Designed a Wide-Band Patch Antenna that met the internship criteria using ANSYS HFSS
Team Supervisor
May 2021 - Jul 2021Research Assistant
Mar 2021 - May 2021
.webp)
Rossell Techsys (Division of Rossell India Limited)
Mar 2022 - Sept 2024Experienced in FPGA RTL Design and Microarchitecture for Aerospace & Defense applications in India | AMD Xilinx ISE Design Suite. Developed aviation standard IP Core for in-house development using FPGAs.
Associate Engineer II (FPGAs)
Aug 2022 - Sept 2024Project Intern
Mar 2022 - Aug 2022
Licenses & Certifications
- View certificate
Hardware Description Languages for FPGA Design
University of Colorado BoulderMar 2024
- View certificate
FPGA Design for Embedded Systems
University of Colorado BoulderFeb 2024 
IELTS
IDP Education LtdOct 2023
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