Shaswat Satapathy

Experience

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  Network Bulls

  May 2017 - Jul 2017

  I had undergone a project semester industrial training and developed a "Hospital Network" in the process.In this logic, we use the multiple Routing Protocols in different areas of the Hospital Network. Now it will show the proper movement of the packet from one part of the hospital to the other part of the hospital. The project initiates from the Billing Department of the Hospital. The Network is established using the RIP Protocol through which all the different departments which are distinguished based on different VLANs. The Inter-VLAN Routing has been implemented in the Network along with the Frame Tagging so that the different VLANs will be able to communicate with each other. Hence, each & every department can communicate with each other. The Wireless end point Technology has also been implemented to let the admin part & the important terms & Staff would be allowed to utilize the Network Resources at the time of urgency. The important security concepts have also been implemented so that the forbidden information of the Hospital Record would not be accessible for the Clients of the Hospital. Show less

  • Network Trainee

    Jun 2017 - Jul 2017

  • Industrial Training

    May 2017 - Jul 2017
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  Indian Institute of Technology, Patna

  Dec 2017 - Feb 2018

  Visiting Research Student

  Worked with Prof Rajiv Misra, Ajay Pratap (Senior Ph.D.) and Shivani Singh to study the stable matching problem in graph theory. We suggested a novel modeling that focuses on optimization of connections in Heterogeneous 5G networks for better data rates at lower power and with minimum spectrum.

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  Indraprastha Institute of Information Technology, Delhi

  May 2018 - Aug 2018

  Summer Research Intern

  Multi-player Multi-Armed Bandits (MAB) have been extensively studied in the literature, motivated by applications to Cognitive Radio systems. My work is to introduce promising heuristic using some deep learning techniques, that can operate without sensing information, which is crucial for emerging applications to the IoT networks.

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  Department of CSE, IIT Hyderabad

  Dec 2018 - Jan 2019

  Visiting Research Fellow

  I was working as a visiting research scholar in Networked Wireless Systems Lab (NeWS Lab) at IIT Hyderabad under the supervision of Dr. Antony Franklin A, contributing in the development of the algorithm architectures to build the country's largest 5G Testbed ( in collaboration IITM, CEWiT, IITD, IITK, IISC and SAMEER) by exploring new possibilities in a cellular network with Mobile Edge Computing (MEC).

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  Missouri University of Science and Technology

  May 2019 - Aug 2019

  Summer Research Student

  I was working with Dr. Ajay Pratap and Daniel St. Clair Endowed Chair Professor Sajal K Das on a variety of problems related to resource allocation in vehicular 5G networks using reinforcement learning and D2D-enabled IoT devices using graphical approach.

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  National Chiao Tung University

  Feb 2020 - Jan 2021

  TEEP@Asia Research Intern

  I was working under the guidance of Dr. Yen-Cheng Kuan. The project goals were the design and implementation of Dilated CNN and LSTM hardware accelerators on the PYNQ-Z2 boards

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  Micron Technology

  Jul 2022 - Aug 2022

  DRAM Product Engineering intern

  Work on geographical-based Pat Average Test (PAT) method to locate and classify defect dies using deep learning. The model predicts the defects which will occur in the back end and prevents over-killing of the die.

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  Micron Technology

  Mar 2024 - now

  DRAM Product Engineer- High Bandwidth Memory R&D

  HBM Probe/Back End Testing• Improve Probe/Backend testing coverage, quality a on HBM products• Own the probe/Backend test flow, review and sign off probe test program release to ensure quality control• Develop creative testing algorithms to improve testing efficiencyNew Generation Product Development• Responsible for new product startup and yield improvement• Support design verification and in-depth circuit of new products using CAD tools and Verilog simulations• Work with the wafer fab process/ integration group to address process-related defects affecting product yield • Identify design marginalities and recommend design fix for circuit-related problemsProduct Yield Enhancement• Identify causes of low yield through systematic analysis• Work closely with various engineering groups in resolving process/defects related issues• Perform electrical/physical failure analysis to understand the failure mechanism relating to defects / fab process• Utilize statistical tools for detailed data analysis on product to drive yield improvement projectsManaged HBM Products• Develop high quality and cost- efficient HBM test strategies• Conduct electrical failure analysis of the HBM products through different phases of the product life cycling such as qualification, high volume manufacturing and customer returns.• Extensive usage of data parsing and data analysis for improving yield, test time and quality of product Show less