Charu Nagarajan

Experience

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  Arcus technology

  Jan 1995 - Jan 1996

  Design Engineer
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  IBM

  Jan 1996 - Dec 2016

  Senior Technical Staff Member ( STSM )

  Physical Design of high performance microprocessors. Currently I lead the microprocessor team co-developing the microprocessor for System Z mainframes. These are very high performance microprocessors running at 5 GHz with the previous generation having over 4 Billion transistors in 22 nm technology.This is very challenging from a design closure point of view and keeps the gray cells fed well :)Earlier to that, I spent 10 years in doing ASIC PD and a few years doing functional verification of hard disk drive controllers. I was the overall lead for the physical design competency in the Bangalore ASIC Design Centre ( this was divested to GF ). I was involved very much in developing the PD competency in Bangalore from scratch. The design centre taped out more than 100 ASICs and 4 generations of microprocessors.I also developed a foundry agnostic Cadence tools based flow when I was part of IBM Engineering and Technology Services. This is was the first time that a vendor tool flow was used ever at IBM.I also worked in the ASIC methodology team for a while to help with improving methodology for PD and timing closure. I was also a Subject Matter Expert for the Bids and Proposals team for Engineering and technology services of IBM and worked with the sales team in several bids for OEM customers.Other than pure execution of the project, I spend a lot of time in encouraging team to innovate and improve productivity. I spend a lot of time in mentoring and spending time in programs related to talent development. Show less

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  Cadence Design Systems

  Jan 2006 - Jan 2007

  Senior AE Manager

  Managing Pre-Sales Application Engineering Team supporting Cadence Digital IC platform. Delivering Cadence solutions to meet customer needs

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  Cadence Design Systems (India) Pvt. Ltd.

  Jan 2017 - Jul 2022

  AE Director
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  Cadence Design Systems

  Jan 2017 - Jul 2022

  Solutions Architect

  AE Director / Solutions Architect - leading the "ARM Center of Excellence" in Cadence Design Systems.. Expertise in Physical Design , Timing Closure and Synthesis of high performance ARM CPUs.

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  Freelance

  Apr 2022 - now

  VLSI professional - currently on sabbatical