Anant Kumar Sharma

Experience

• 

  UDYAM

  Oct 2020 - Apr 2021

  Event Coordinator - I-CHIP
• 

  Texas Instruments

  May 2021 - Jul 2021

  Digital Design Intern

  • Worked with RADAR Physical Design team on the project : Automated Timing Constraints Generation, QC and Validation. • Auto-generated and merged subchip constraints(SDCs) to TOP in STA. • Developed automation to derive waivers for Tempus violations, Constraints QC.

• 

  Texas Instruments

  Jul 2022 - now

  • Developed the Functional Safety Verification environment and owned Fault Injection for IPs (DMA, INTERCONNECT) for safety certification of xWRL6432•Handled Functional Safety Documents Creation for Radar SoC xWRL6432, AWR2944 and contributed to the TUV audits.•Functional verification of SoC peripherals such as SPI, QSPI and IPs including DMA, SoC Interconnect, MPU.•Debugged RTL and GLS issues at SoC. Verified IO Characteristics involving close collaboration with Cross-Functional Teams. •Verified post-silicon issues for Radar SoC IWRL6432, AWR2944, Customer Issues for Gen-1 Radar devices•Developed UVM testbench infra for bus-safety verification. Verified critical scenarios and owned ECO Verification•Got the opportunity to present the work in conferences : TI DVCON, TIITC, TLC, CadenceLive Show less

  • Digital Design Engineer (Job Grade 26)

    Feb 2024 - now

  • Digital Design Engineer (Job Grade 24)

    Jul 2022 - Jan 2024