
Ken Chai

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About me
Technologist
Education

Universiti Teknologi Malaysia
2006 - 2010Bachelor of Engineering (BEng) Electrical, Electronics and Communications Engineering 3.98Activities and Societies: UTM IEEE Malaysia Student Branch Vice President Major Power Electronic i.e. power FET switches & Electric i.e. kV transmission , electric motor
Experience

Intel Corporation
May 2010 - Jun 2021Validation architect on Intel Server High-Speed IO & PHY interconnect - IAL (Intel Accelerator Link), R-link, CXL & PCIe Scope of experience :System verilog design & verification;CXL subsystem integration & verification;IAL/CXL validation & design micro-architecture;OVM/UVM functional simulation;Unit level verification with formal verification (FPV with Jaspergold);IAL related SoC validation test plan development.Assignment to help on DFX (Design For Test/Manufacuring/Debug) integration. Show less
FPGA Prototyping Pre/Post Validation Engineer
Apr 2019 - Jun 2021Formal Verification
Jan 2015 - Jun 2021Staff Design Verification Engineer
Oct 2016 - Mar 2019Validation Lead
Oct 2014 - Sept 2016Senior Design Engineer
Oct 2014 - Sept 2016System-on-Chip Design Engineer
May 2010 - Sept 2014

Jaben Malaysia
Jan 2011 - Jun 2020Member Board Of DirectorsBusiness owner, sale specialist in distributing earphone, headphone, and custom In-Ear Monitorting for professional and leisure purpose.

Great Eastern Life
Jan 2012 - Oct 2016Licensed Insurance AgentSales & marketing as Life Planner Risk management, personal financial planning, insurance, investment vehicles, estate planning and personal taxation (CFP)

SiFive China
Jul 2021 - Jul 2022Senior Staff Design EngineerRISC-V CPU Design Verification

StarFive Technology Co., Ltd.
Jul 2021 - nowPrototype SpecialistPrinciple Engineer, leading StarFive RISC-V FPGA prototyping on S2C Prodigy VU19P System. Multi FPGA solution for large ASIC & SoC. Incorporating Synopsys Symplify, S2C PlayerPro and Xilinx Vivado tools for prototyping. Taking on first in world heterogenous RISC-V on FPGA system, with multiple of performance and efficient cores. Enabling real world comprehensive SoC FPGA system validation. E.g. shift left RISC-V secure boot, riscv boot via SDMMC to Linux, enabling multimedia and NPU testcase. FPGA prototyping for benchmark test, performance modelling and characterization. Show less
Licenses & Certifications
- View certificate

SNUG SOUTH ASIA 2021
Synopsys IncOct 2021 - View certificate

Formal Verification Central Technical Office Practitioner
Intel CorporationMay 2021
Honors & Awards
- Awarded to Ken ChaiBachelor Degree (Honour) Engineering Universiti Teknologi Malaysia May 2010 Electrical Faculty Dean List. Honourable graduate with CPA 3.98.
Languages
- enEnglish
- chChinese
- maMalay
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