Talk to sales Try for Free

Mihir Parekh

Design Engineer - R & D

780 followers

Pune, Maharashtra, India

Connect with Mihir Parekh to Send Message

Connect with Mihir Parekh to Send Message

Timeline
About me
Project Lead - Electronics Hardware at Marquardt India Pvt. Ltd
Education
- Vit university vellore campus
  2012 - 2014
  Master of Technology (M.Tech.) VLSI Design 9.18
  Tools and Languages known to me :1) Software and Simulink Tools• MENTOR GRAPHICS MODELSIM, ALTERA-QUARTUS-II• Familiar with ALTERA DE-I, II Boards.• CADENCE- VIRTUOSO, NCLAUNCH, SoC ENCOUNTER• BASICS OF MATLAB• KEIL- uVISION42) Programming Language• VERILOG/VHDL• 8051 ASSEMBLY LANGUAGE• PERL, TCL• C, C++
- Saurashtra University
  2007 - 2011
  Bachelor of Engineering (B.E.) Electronics and Communications Engineering Distinction
  B.E. in Electronics & Communication Engineering
Experience
- Mitsubishi Electric in India
  May 2014 - Feb 2017
  Design Engineer - R & D
  • Study & interfacing of ASIC with processor.• Designing circuit for SDHC, USB, Ethernet & seven segment display.• Interfacing processor with DDR3 & Flash ROM memories.• Responsible for board bring up activity.• Functional testing.• Integration testing.• Chamber & EMI / EMC testing.
- SEDEMAC
  Feb 2017 - Jan 2018
  Electronic Design Engineer
  Automotive Electronics circuit design
- Spark Minda
  Apr 2018 - May 2021
  Assistant Manager Hardware
- Marquardt India Pvt. Ltd
  May 2021 - now
  - Project Lead
    May 2024 - now
  - Sr. engineer
    May 2021 - May 2024
Licenses & Certifications
- MATLAB Certified by Mathworks
  Mathworks
Honors & Awards
- Awarded to Mihir Parekh
  Scholarship due to 2nd Rank in University final year exam Saurashtra University Jul 2011
Volunteer Experience
- Class Representative
  Issued by VIT University on Jul 2012
  Associated with Mihir Parekh