Subhalakshmi Sarkar

Subhalakshmi Sarkar

Editor In Chief

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location of Subhalakshmi SarkarRaleigh, North Carolina, United States

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  • Timeline

  • About me

    CPU Verification Engineer at Qualcomm-NUVIA

  • Education

    • Manipal Institute of Technology

      2013 - 2017

      Activities and Societies: Student Council, The MIT Post

    • North Carolina State University

      2021 - 2023
      Master of Science - MS Computer Engineering 4.0/4.0

      Coursework:ECE 506 - Architecture of Parallel ComputersECE 563 - Microprocessor ArchitectureECE 564 - ASIC and FPGA design with VerilogECE 745 - ASIC VerificationECE 721 - Advanced MicroarchitectureECE 544 - Design Of Electronic Packaging and InterconnectsECE 592(096) - Secure Processor ArchitectureECE 748: Advanced Verification with UVMECE 566: Compiler Optimization and Scheduling ECE 542: Neural Networks

  • Experience

    • The MIT Post

      Sept 2015 - Sept 2016
      Editor In Chief
    • Cisco

      Aug 2017 - Jul 2021

      Products Managed: NCS5500, NCS5700• Engaged with Engineering teams for the Product development from Early Design Engagement; built roadmaps on new technologies, mitigated challenges related to manufacturing assemblies, component packages, process technologies by launching Test vehicles and performing component risk mitigation.• Engaged on Projects with complexity of fabs with more than 20 layers, PCBA with over 30,000 joints, Size- 20”x18”, VIPPO, backdrill, pressfit, paste in hole components; 16 mil fine pitch and large size BGAs (implemented edge bonding) meeting 6 sigma yields goals at contract manufacturing sites• Provided DFM/DFT - PCBA and FAB analysis, using “Valor / Allegro” CAD tool• Engaged on Board Bring-ups and Debugging for proto and mass production builds• Engaged with CMs, to meet 6 sigma yield goals, for mass production builds, which could involve process improvement, fixture development or diagnostics change (in collaboration with cross functional diagnostics team)• Engaged with CMs to develop edge-bonding process for large size BGAs •Component failure analysis with component vendors.• Provided cost optimization through value engineering by product tear-down analysis.• Provided alternate manufacturing solutions during supply chain shortages from 2020 through 2021. Show less

      • Product Engineer

        Mar 2018 - Jul 2021
      • Product Engineer

        Aug 2017 - Mar 2018
    • NC State Campus Enterprises

      Oct 2021 - Feb 2022
      Dinning Associate
    • North Carolina State University

      Feb 2022 - May 2022
      Graduate Research Assistant

      Aided research in Secure and Advanced Computer Architecture (SACA) group.Assisted in research in memory security of GPU to achieve minimal overheads while making the best use of GPU resources by writing C++ programs to characterize workloads, making modifications to l2cache classes of gpgpu sim to simulate security features, data collection, and data visualization with gnuplot.

    • Intel Corporation

      May 2022 - Jan 2023
      SoC Pre-Si Emulation Validation - Graduate Intern
    • North Carolina State University

      Jan 2023 - May 2023
      Graduate Teaching Assistant
    • Qualcomm

      May 2023 - now
      CPU Design Verification Engineer
  • Licenses & Certifications

  • Volunteer Experience

    • Teacher

      Issued by Step Up For India on Aug 2017
      Step Up For IndiaAssociated with Subhalakshmi Sarkar