Madhur J.

Madhur J.

location of Madhur J.Bengaluru, Karnataka, India

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  • Timeline

  • About me

    Associate Technical Director at Samsung Semiconductor

  • Education

    • D.P.S. Faridabad

      2003 - 2005
      12th Non medical Distinction

      Studied Physics, Chemistry & Maths.

    • Aggarwal Public School, Ballabgarh

      1991 - 2003
      High School Distinction
    • NATIONAL INSTITUTE OF TECHNOLOGY SRINAGAR

      2006 - 2010
      Bachelor of Technology (B.Tech.) Electronics & Communication Distinction

      B.Tech. graduate in Electronics and Communication and have done project on designing CDMA based transmitter & receiver using PSpice.

    • Birla Institute of Technology and Science, Pilani

      2015 - 2017
      Master of Technology (M.Tech.) Embedded systems

      Completed M.Tech. in Embedded systems.

  • Experience

    • Whirlpool of India Ltd.

      Jul 2010 - Jun 2014

      - Lab management,field failure simulation, looking after the design requirements from codes(IEC) & safety point of view and preparing the test plan as per the design FMEA.- Test set up preparation as per company test standards and IEC test standards.- Reliability testing of components as well as complete product using accelerated testing conditions to estimate their life under real field conditions. - Project management, cross functional alignment and end to end implementation of projects of cost optimization and quality improvement.- Wiring harness design for refrigerator understanding the current requirement, connection requirement as per manufacturing process and routing constraints.- Controls integrator that includes integration of electronics and electromechanical components for complete product design.

      • Controls Lab Engg.

        Jul 2012 - Jun 2014
      • Controls Integrator

        Jul 2010 - Jun 2012
    • Indian Institute of Astrophysics, Bangalore

      Jun 2014 - Jul 2018
      Engineer B

      - Understanding the requirement of project from science team at ISRO and converting them into technical specification needed for the development of space based astronomical instruments (ADITYA L1 mission).- Developing digital logic in FPGA for image processing and data compression in ISE design suite (Xilinx )using VHDL/Verilog. - Developing digital logic in FPGA for generating control signals for CMOS/CCD image readout electronics in Libero IDE (Microsemi) using VHDL/Verilog.- Test bench development and design simulation in ISIM and Modelsim to verify the behavior of the complete system within the specified user constraints.- Developing interface between FPGA development board and computer viz. RS-232 and ethernet using MATLAB.- Calibration of imaging CMOS detectors for characterization and noise estimation using MATLAB.- Developing control electronics for controlling stepper motor drive electronics using pic controller.- Developing schematic in OrCAD Capture and its simulation in PSpice. Show less

    • SAMTEL AVIONICS LTD.

      Jul 2018 - May 2019
      Manager FPGA

      - Data processing and interfaces control using FPGAs for Defence displays.

    • Samsung Semiconductor

      May 2019 - now

      - Converting system level requirements into technical specification and developing micro-architecture.- SerDes interface development in FPGAs for NR (5G) and LTE physical layer.

      • Associate Technical Director

        Mar 2024 - now
      • Senior Chief Engineer

        Aug 2021 - Feb 2024
      • Chief Engineer

        May 2019 - Jul 2021
    • Samsung Semiconductor

      -
      Associate Technical Director
  • Licenses & Certifications