Jae Sung Lee

Jae Sung Lee

SiC FEOL Process Engineer

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location of Jae Sung LeeGyeongju, North Gyeongsang, South Korea

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  • Timeline

  • About me

    Unit Process Development Photo Engineer

  • Education

    • 위덕대학교

      2014 - 2021
      학사 반도체공학
  • Experience

    • SK Powertech

      Dec 2022 - Jul 2023
      SiC FEOL Process Engineer

      Product : SiC Power Device (JBS, MPS,MOSFET)Job :1) Yield management & Defective product- EDS Test Data arrangement & Analysis- Process Integration for Yield Improvement- tightening up the EDS Test Condition to decrease Risk of Product in Field- EDS Low Yield Products Analysis

    • Onsemi

      Aug 2023 - now
      Unit Process Engineer (Photo)

      * Product -. SiC Power Device : Planar MOSFET, TRENCH MOSFET -. Si Power Device : IGBT, FRD, LV&MV FETJob : Photo Unit Process DevelopmentRole&Responsibility1) To deal with the issues that is from Engineer Run for product development(Especially In Photo Process)2) Make a Photo Jobs & Overlay Check for Photo process using new reticle3) NEW PR Evaluation & Set-up for SiC Trench MOSFET in high performance4) NEW PR Evaluation & Set-up for SiC Trench MOSFET's IMP Process Show less

  • Licenses & Certifications

    • 교육)디지털집적회로

      IDEC (반도체설계교육센터)
      Jul 2020
    • 교육)Full-Custom Chip Design

      IDEC(반도체설계교육센터)
      Apr 2019
    • 대학생을 위한 반도체공정실습교육 2019

      SEMI
      Jul 2019