
Venkateswara Rao Mandela
Project Trainee

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About me
MGTS | Boot ROM Development Manager at Texas Instruments
Education

Gowtham Junior college
1997 - 1999Intermediate
St. Mary's EM High School, Prathipadu
1993 - 1997
Indian Institute of Technology, Madras
1999 - 2003B.Tech
Indian Institute of Technology, Madras
2003 - 2005M.Tech
Experience

Texas Instruments India
Jan 2004 - Jan 2005Project TraineeAs a project trainee, I gained experience with the TMS320C64X processor and the XDAIS software frame work. I implemented 1) Dynamic range correction and 2) Spectrum analyzer for music.As my major project, I developed Receiver algorithms for Digital Radio Mondiale (DRM). DRM is an open standard for digital radio based on OFDM. Within a six month period, I developed a receiver and successfully decoded the audio streams from DRM transmissions.

Sarnoff Innovative Technologies Pvt Ltd
May 2005 - Apr 2008DSP domain---------------I worked in the team that first ported a Sarnoff Automotive algorithm(Lane departure warning) on to a DSP.I designed the software framework and the testing methodology to quickly convert the predominantly floating point code to fixed point. I integrated the final system and interacted extensively with the customer.Algorithm work------------------I modified the Lane departure warning system to enable real time operation. I added Ground plane detection capabilities to enable robust operation on inclined roads. Show less
Senior Software Engineer
Apr 2007 - Apr 2008Software Engineer
May 2005 - Mar 2007

Texas Instruments
May 2008 - now• Boot ROM and Device Security architecture for the next generation devices• Leading the Boot ROM team • Led the development of Boot ROM for AM62x, TDA4x and AM26x device families• Innovations in ROM reuse across devices, improved test methodologies • Designed and implemented the security firmware (TIFS) to handle secure boot, secure debug, memory protection and resource isolation between multiple cores. • Designed the secure key provisioning tool (TI Keywriter) used across Jacinto, Sitara MPU, Sitara MCU and Radar product lines.• Rearchitected the security firmware to allow 3P HSM/Customer HSM specific stack to be integrated into one binary. Worked on IPC, Display and boot time optimizations across the U-Boot, Kernel and RTOS.• Achieved 50 ms CAN response time from cold boot using a novel Execute-in-Place(XIP) scheme• Achieved 1.7s boot time for 2D surround view including camera initialization over FPDLink.• Achieved 150 ms splash screen on TDA2 platform. This approach went into production on a Marine headunit.• Multiple application notes detailing boot time optimizations for TDA2 platform.
MGTS | Boot ROM Development Manager
Dec 2023 - nowBoot ROM Development Manager
Apr 2021 - Dec 2023Principal Engineer | Security Firmware
Jan 2018 - Mar 2021Principal Engineer | Early Boot & Display
Aug 2014 - Dec 2017Senior Software Systems Engineer
May 2008 - Jul 2014
Licenses & Certifications

ISO 26262 Functional Safety Engineer
TUV SUD
Certified Automotive Cyber Security Practitioner (CACSP)
Tuv Sud South Asia PrivateLimitedOct 2025
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