Michael J. Belliveau    PMP®

Michael J. Belliveau PMP®

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  • Timeline

  • About me

    Sr. Engineering Manager Processor Validation Tools at IBM

  • Education

    • Rochester Institute of Technology

      -
      BEEE Electrical Engineering
    • Syracuse University

      -
      MSCE Computer engineering
  • Experience

    • IBM

      Jan 1993 - now

      Hardware Development. Processor card design.Problem: Need for processor card for new system design.Action: Designed two alternatives: a processor only card, and a processor with L2 cache. Size con-strengths required BGA processor package, and stack SRAM package. Worked through thermal and mechanical con-strengthsResults: Completed design with L2 cache. Although design was more complex, and there were some thermal issues that were worked through, the performance as superior to the alternative design.Problem: Need for a processor upgrade Action: As lead engineer, designed upgrade card. Coordinated with manufacturing, software and engineering system test and card physical design. Debugged defective cards using design of experiment (DOE) techniques.Results: Single pass functional card, thereby eliminating cost associated with multi pass designs as well as test time. Timely development of this card enabled it to be an alternate debug vehicle for a follow on processor. Technical knowledge and persistent attention to details resulted in first pass working design of a 66MHz bus. Problem: SCSI Bus Resets occurring on systems. This has been a problem for 3 years with no solution. This was acceptable on a desktop system, but this new design was on a server and was not acceptable.Action: Using Design of Experiment (DOE) techniques, discovered the problem was not with the system design, but with vendor peripherals. Gathering data and working with the vendors, fix the problems. I communicated the problems to system test so testing could continue with known errata until new hardware was available for regression testing.Results: Able to announce system on schedule. Performance was improved on the SCSI bus by 1-2 percent. Show less

      • Sr. Engineering Manager Processor Validation Tools

        Oct 2018 - now
      • Sr. Engineer Hardware System Test Project Manager PMP

        Jan 2004 - Oct 2018
      • Sr. Engineering Manager

        Oct 1999 - Jan 2004
      • Development Engineer

        Jan 1993 - Oct 1999
  • Licenses & Certifications

    • IBM watsonx.ai Technical Essentials

      IBM
      Apr 2024
      View certificate certificate
    • IBM Mentor

      IBM
      Apr 2019
      View certificate certificate
    • Scrum Fundamentals Certified Credential

      VMEdu Inc.
      Apr 2017
    • Project Management Professional

      Project Management Institute
      Mar 2005
    • First Patent File

      IBM
      Oct 2018
      View certificate certificate