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Tsung-Ching Lin

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Hsinchu City, Taiwan, Taiwan

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Timeline
About me
Technology Development Engineer at TSMC
Education
- 國立成功大學
  2007 - 2011
  Bachelor of Science (BS) Engineering Science
  Activities and Societies: Badminton team
- 國立交通大學
  2011 - 2013
  Graduate Student Researcher Electronic Engineering
  Emerging Device and Technology Lab
Experience
- TSMC
  Nov 2013 - now
  SRAM engineer - N16/N7/N3• Advance process(finFET, HKMG and more) trouble shooting by electrical characteristic analysis (WAT)• SRAM test pattern design for yield ramp and process improvement• SRAM bitcell design optimization: Explore each tech node process limitation, then feedback to bitcell layout to output most competitive SRAM chip(in aspect of area/speed/leakage)• SRAM nature yield and Vmin improvement• eFuse product: serve as eFuse RD owner, works on yield improve, program window & everything related to eFuse Qual. Have successfully Qualify eFuse IP in N7 tech node Show less
  - Technology Development Engineer
    Nov 2013 - now
  - Research Development Process Engineer
    Nov 2013 - now
Licenses & Certifications
- TOEIC 935
  TOEIC® Program
  Nov 2012
- TOEFL 99
  ETS
  Nov 2012
- Programming for Everybody (Getting Started with Python)
  Coursera
  Dec 2020
  View certificate
- Python Data Structures
  Coursera
  Dec 2020
  View certificate