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Vinayak Badiger

Vinayak Badiger

Followers of Vinayak Badiger2000 followers
location of Vinayak BadigerBengaluru, Karnataka, India

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  • Timeline

  • About me

    Layout Engineer at Texas Instruments | VLSI Enthusiast

  • Education

    • Janata Vidyalaya, Dandeli

      -
      SSLC 97.92%

    • KLE Technological University - Hubballi (India)

      2019 - 2023
      Bachelor of Engineering - BE Electronics and Communication Engineering 9.3/10

    • Chetan PU Science College , Hubli

      2017 - 2019
      12th PCMB 92.67%

  • Experience

    • Texas Instruments

      Jan 2023 - now

      Process nodes: tsmcN28, tsmcN16Design experience: Worked on different sub-blocks of DAC_BIAS, DITHER block and DAC CELL in one of the test chips.I have designed analog sub-blocks like amplifiers (5-pack & 7-pack) and Bias gens.Experience in generating extracted netlists for layouts in different process corners. I have extensively worked on EM analysis and solving the related issues.

      • Layout Engineer

        Jul 2023 - now

      • Layout Intern

        Jan 2023 - Jun 2023

  • Licenses & Certifications

    • Phase-locked Loops

      NPTEL
      Nov 2022