李浩

李浩

ASIC Engineer

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location of 李浩Minhang District, Shanghai, China

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  • Timeline

  • About me

    Staff Engineer ASIC at Seagate Technology

  • Education

    • Shanghai institute of microsystem and information technology

      1998 - 2001
      Master’s Degree MEMS
    • 武汉大学

      1994 - 1998
      Bachelor’s Degree 半导体物理学
  • Experience

    • 华为

      Apr 2001 - Oct 2006
      ASIC Engineer

      Baseband processor chip of WCDMA mobile phone Setup verification environment of baseband processor of WCDMA for mobile phone Be responsible for verification environment and verification of Cell search, multi-wave search and multi-wave merge block Using Verilog, SystemC. Knowledge about WCDMA baseband and HFWave shaping of multi-carrier research of WCDMA Design FPGA and verify it for wave shaping of multi-carrier of WCDMA Performance testing of wave shaping in validation platform Show less

    • LSI, an Avago Technologies Company

      Oct 2006 - Aug 2014
      Staff ASIC Engineer

      ACP5500(Advanced Network Co-Processor) verificationLCP(Link layer Network Co-Processor) verification and emulation Be responsible for SAS(Slow-Access-Subblock) block verification. Setup the SAS block verification environment and do testing for SAS and the sub-blocks of SAS, such as UART, I2C, MDIO, USB, SPI, TRNG, Timer, GPIO, etc. Knowledge about SystemVerilog, OVM, ARM, BusMatrix AXI/AHB/APB, Dickens, etc.UltraMapper(SDH/SONET) Validation and emulation Test UltraMapper chip on board. Setup validation platform and test whole chip testcases on board.UltraMapper verification Setup UltraMapper verification environment and do test.Responsible for verification of ATCA, STS3C, TPGC, SPEMPR, STS1LT, etc.Using SpecmanE. Knowledge about SDH/SONET Show less

    • Seagate Technology

      Sept 2014 - now
      Staff Engineer ASIC

      Griffin/Neptune/Mars(Product name of Solid Static Disk Controller) emulation Using FPGA board, chip board or Palladium to verify ASIC design Focus on Core block emulation, including MAP, packer/unpacker, MPU, CMS, DMA,etc. Using C/C++, GDB, Shell, Python, Tensilica architecture(CPU), Palladium

  • Licenses & Certifications

    • Master of Microelectronics and Solid State Electronics

      Shanghai Institute of Metallurgy, Chinese Academy of Sciences