
JOONMO YOO

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About me
Chief Operating Officer / VicePresident at SKAIChips
Education

Seoul National University
2002 - 2004Master's degree Electrical engineering Grade = A and Percentage : 92.80
아주대학교
1998 - 2002Bachelor of Science (BS) Electrical engineering Cumulative 3.97/4.5 and Percentage : 93.7Activities and Societies: Guitar and Vocal
Experience

GCT Semiconductor
Mar 2004 - Jun 2014 Multi-mode multi-band MMMB system RF HW evaluation. Common jobs over all multi-mode RFIC engineering: Build the evaluation board each (hardware) Schematic/Layout review & modification GSM RFIC (w/ Analog BB) verification/design-feedback CDMA RFIC (w/ Analog BB) verification/design-feedback FDD LTE RFIC verification/design-feedback Experience CMOS 0.11um technology Evaluated/Debugged RFIC w/ CMOS 0.13um from 0.25um Verified LNA integration & RxSAW-less Evaluated SHDR (Simultaneous hybrid dual receiver) Debugged the new feature and well-shared the design feedback for further revision Single-chip multi-mode multiband RFIC GSM Quad & WCDMA Quad & LTE B13/B4/B7 Evaluate and Setup the full system of measurement Understand/Study 3GPP specification for LTE additionally Made RF link budget for RF basic system requirement LTE specification based on 3GPP Rel 8 Prepare the domestic exhibition and show the full demo to the government and participated persons in exhibition 3GPP/3GPP2 specification knowledge accordingly Firmware development for each RF verification New engineering challenging: Extend to work for Beidou (China Satellite) RF part with debugging/evaluating GPS/Beidou RF both. Evaluated for GSM/CDMA&EVDO digital interface verification/debugging for design feedback including System PLL/ADC & DAC and ABB part) Show less Various CDMA products evaluation & design-feedback Multi-band Cellular/PCS/AWS HW tuning/evaluation GPS evaluation/optimization Multi-band + GPS system configuration Rx diversity system evaluation Digital-controlled oscillator (DCXO) scheme adjustment Work with several vendors to customize Crystal’s spec. Develop and Evaluate GSM+WCDMA RFIC w/ Analog BB based on 3GPP Interface with Fujitsu BB Band configuration GSM GSM850/EGSM/DCS1800/PCS1900 (Quad) WCDMA 800M/1.8G/2.1G/1.5G (Quad) Evaluation Schematic/Layout Board build & HW tuning Implement GUI (based on MFC) to load SPI parameter Understand/Study 3GPP specification for GSM/WCDMA Made RF link budget for RF basic system requirement on GSM/WCDMA each Write Design verification plan & report (DVPR) Implement VEE auto-measurement program based on DVPR Many customers-supporting over various kinds of platform/transceivers China Telecom targeted China/Taiwan customers US Verizon/Sprint targeted China customers Samsung TN at Korea and Samsung Guangzhou Show less PHS RFIC verification/design feedback for revision of RFIC. RFIC evaluation board/reference HW build Schematic/Layout work HW matching & SW optimization Developed RF verification software with MFC interface Developed GUI for SPI Loading CDMA RFIC verification/debugging/design-feedback for RFIC revision Schematic/layout work for evaluation board build HW matching to improve RF performance Developed GUI for SPI loading (New) Implemented RF measurement tool by using Agilent VEE tool CDMA RFIC system development Interface with CDMA BB from VIA Telecom, inc Firmware release and HW debugging For Cellular BC0/BC10 and BC5 450MHz Technical support to VIA Telecom and many ODM companies On-site support and Problem/Solving for many HW and RFIC issues Widen the knowledge of 3GPP2 specification for CDMA2000 Made RF link budget for RF basic system requirement Give the technical training to the internal engineers and the Implemented RF measurement tool by using Visual Basic Technical support to UT-Starcom Problem & Solving HW and firmware debugging on the phone-form factor RF Driver implementation for BB-RF interface and RFIC operation Show less
R&D manager in Mobile Platform division
May 2010 - Jun 2014R&D Manager in Principal engineering group
Jul 2007 - Apr 2010Staff Engineer in Principal engineering group
Mar 2004 - Jun 2007

Melfas
Jul 2014 - Nov 2016Group Leader (Su-seok) in Chip Development GroupChip development Group Leader and R&D Program manager Evaluate Touch controller IC and TDDI and Design feedback to the analog/digital designersFamiliar with the embedded solution based on ARMTechnical support to the customers and internal F/W and S/W engineersManage Final Test yield and realiability of ICExperience CMOS 0.11um/0.162um/0.18um for touch solutions and 90nm for TDDIUnderstand F/W algorithm and design approach to overcome the various technical barrierFamiliar with various Foundry site and Package house and organize/arrange the required thingsProvide China-oriented solution and interest to the local customerReponsible for the overall schedule of R&D in MELFAS and technical share with Melfas's internal Sales/FAE/Marketing/QA/Manufacturing division in order to make the same road.Simulate the original cost of the specific design and Suggest the cost-effective solution to R&D Show less

Celfras
Nov 2016 - Mar 2021技术开发总监 (총감)
SKAIChips
Mar 2021 - nowChief Operating Officer / Vice President
Licenses & Certifications

HSK
HSK
Languages
- 한국한국어
- enEnglish
- chChinese
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