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Mark Fahey

Mark Fahey

Semi-Conductor Fab Process Engineer

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  • Timeline

  • About me

    Product Development Lead at Intel Corporation

  • Education

    • Project Management Institute

      2009 - 2009
      Associate's degree Project Management Distinction

    • Institute of Technology, Tallaght

      1992 - 1995
      Bachelor's (Ordinary) degree Electrical and Electronics Engineering Distinction

    • Institute of Technology Blanchardstown

      2008 - 2010
      Bachelor's (Honours) degree Mechatronics 1st Class Honours

  • Experience

    • Intel Corporation

      Jan 2001 - Jan 2010
      Semi-Conductor Fab Process Engineer

      Etch Process engineer for Fab semi-conductor manufacturing. 9 years engineering experience on Lam, Tel and Hitachi etch systems.Expert in vacuum and plasma systems and technologies.

    • Intel Corporation

      Jun 2010 - now

      Lead engineer in the area of test content development for Intel SOC & Chipset family of products.1. 3 years experience in ATPG test pattern generation working on Intel System-on-Chip (SoC) designs.2. Expert in GLS (Gate level simulation) validation, debugging of design issues that contribute to lost test coverage, root causing ATPG issues to ensure maximum Test coverage on A-0 Si. 3. 2 years experience in RTL validation, Stuck_at and at-speed Scan development.4. 3 years experience in Hard IP integration and validation.Papers publish to conferences on Test Module Validation and HIP Design model integration. Show less

      • Product Development Lead

        Jan 2020 - now

      • Product Development Manager

        Jul 2016 - now

      • Product Development Engineer

        Jun 2010 - now

  • Licenses & Certifications

    • Lean Six Sigma Black Belt (ICBB)

      Acclaim Badging