Komal Charan Garlapati

Komal Charan Garlapati

Project Trainee

Followers of Komal Charan Garlapati2000 followers
location of Komal Charan GarlapatiHyderabad, Telangana, India

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  • Timeline

  • About me

    Lead Hardware Engineer at GE Vernova

  • Education

    • Vellore Institute of Technology

      2013 - 2015
      Master of Technology (M.Tech.) Power Electronics and Drives
    • KL University

      2009 - 2013
      Bachelor of Technology (B.Tech.) Electrical and Electronics Engineering
  • Experience

    • Honeywell

      Dec 2014 - Jun 2015
      Project Trainee
    • Honeywell

      Aug 2015 - Oct 2021
      • Advanced Systems Engineer

        Oct 2020 - Oct 2021
      • Hardware Engineer II

        Oct 2018 - Oct 2020
      • Engineer

        Aug 2015 - Sept 2018
    • GE Vernova

      Oct 2021 - now
      Lead Hardware Engineer
  • Licenses & Certifications

    • Hardware Description Languages for FPGA Design

      University of Colorado Boulder
      May 2025
      View certificate certificate
    • Introduction to FPGA Design for Embedded Systems

      University of Colorado Boulder
      Nov 2023
      View certificate certificate
    • Allegro Design Entry HDL Front-to-Back Flow vSPB17.4 Exam

      Cadence Design Systems
      Jan 2024
      View certificate certificate