Kee Sim Cheng

Experience

• 

  Intel Corporation

  Nov 2006 - Nov 2018

  Spearheaded the integration of former Altera products into Intel's manufacturing operations by overseeing tester migration, manufacturing setup, and redefining test methods to ensure seamless integration and operational efficiency.Led several FPGA projects' Technical Readiness (TR) and Cost Reduction Opportunity (CRO) programs aimed at enhancing the gross margin of next-generation FPGAs, driving innovation and cost-effectiveness across multiple projects.Played a pivotal role in optimizing and standardizing FPGA Test Program (TP) and manufacturing architecture, streamlining processes and enhancing overall efficiency within the manufacturing ecosystem. Show less Spearheaded test program development for Intel's in-house tester pathfinding initiative for Platform Controller Hub (PCH), driving innovation and efficiency in testing methodologies.Led test program development and collaborated with the CPU team across multiple geographic locations as the PCH Point of Contact (POC), facilitating the enablement of Intel's first Ultrabook Multi-Chip Package (MCP) solution across various packages.Enabled concurrent testing capabilities, enhancing throughput and efficiency in the testing process.Owned Time-to-Release (TTR) and Customer Support Escalation (CSE) processes, ensuring timely product release and effective resolution of customer issues. Show less Led the development and management of test programs for CMT testers, ensuring efficient testing processes and successful deployment to High-Volume Manufacturing (HVM) for Integrated Controller Hub (ICH)/Platform Controller Hub (PCH) products.Conducted comprehensive validation of ICH PCI/Legacy content through RTL/VTPSIM validation, test vector tool setup/conversion, and post-silicon validation, contributing to the enhancement of product quality and reliability.Managed fuse ownership tasks, including test class writing and HVM deployment for PCH products, optimizing testing methodologies and facilitating seamless manufacturing processes.Directed Time-to-Release (TTR) processes, ensuring timely product releases and coordinating cross-functional efforts to meet project deadlines effectively and efficiently.Played a key role in the development of the first PCH universal test program, significantly improving development and manufacturing efficiency by streamlining testing procedures and enhancing overall product quality. Show less

  • Technical Lead, FPGA Manufacturing Integration and Optimization

    Nov 2016 - Nov 2018

  • Senior Product Develop Engineering and Manufacturing Integration

    Nov 2014 - Nov 2016

  • Senior Test Program Lead Platform Controller Hub (PCH) Testing and Integration

    Nov 2010 - Nov 2014

  • Test Program & Content develop Owner Platform Controller Hub (PCH)

    Nov 2006 - Nov 2011
• 

  Altera

  Nov 2018 - now

  MFG Chief Engineer for FPGA & Test Foundry Office

  Leading small team and path finding for Altera Test Manufacturing Foundry Office Solution which involve Tester, SLT, BI, OSAT, Test tools automation from TP Gen, Pattern conversion tools, debug capability & etc to improve engineering efficiency and improve product TTM & product margin.Manufacturing (MFG) Chief Engineer specializing in FPGA technology within the IPU, 5G, Data Center, and broad market segments. On top demonstrated expertise in managing customer and manufacturing issues, offering effective solutions that enhance product performance and customer satisfaction.Led, defined, and executed comprehensive DFT strategy, manufacturing solution, product health improvement, and production execution strategies. Coordinated cross-functional teams encompassing finance, product architecture, design, validation, and software development to ensure seamless operations from pre-silicon to post-silicon phases.Taking ownership of cost optimization and fostering collaboration with sales and marketing teams to align product development with market demands and revenue targets which improving product margin. Show less