Nikhil Shewani

Experience

• 

  CHAROTAR UNIVERSITY OF SCIENCE AND TECHNOLOGY

  May 2020 - Jul 2020

  ROS(Robot Operating System)

  Working with a robot software platform (ROS) environment, based on Ubuntu.

• 

  CHAROTAR UNIVERSITY OF SCIENCE AND TECHNOLOGY

  May 2021 - Jul 2021

  SystemVerilog Intern

  Gained understanding of SV language constructs, testbenches and it's components. Verified combinational logic blocks using SV testbenches.

• 

  Numascale AS

  Jan 2022 - Mar 2023

  Part of ASIC Verification team, working on BullSequana Exascale Interconnect v3. Activities included:- Understanding design module from specifications- Documenting verification plans for the module - Testing the given module with various test cases & bug reporting - Writing coverage for the module - Strengthened SV knowledge, and became familiar with the UVM TB architecture and methodology constructs as a part of my training.- Designed & Verified a synchronous FIFO module (with relevant status & error signals) by building SV and UVM testbench from scratch

  • Design Verification Engineer

    Jul 2022 - Mar 2023

  • ASIC Verification Trainee

    Jan 2022 - Jun 2022
• 

  EASii IC

  Apr 2023 - now

  Design Verification Engineer

  Part of ASIC Verification team, working on ADDAe v2. Activities included:- Understanding design module from specifications- Documenting verification plan using LaTex tool.- Writing C & UVM based test cases & bug reporting- Understanding various Digital-Signal-Processing blocks and perform their verification using a UVM-Python framework- Forming a python script to Streamline the test development, CI deployment status, and test documentation.