Saifullah Shafie

Saifullah Shafie

Internship

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location of Saifullah ShafiePenang, Malaysia

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  • Timeline

  • About me

    Senior Product and Test Engineer

  • Education

    • Universiti Teknologi MARA

      2013 - 2016
      Bachelor's degree Electrical and Electronics Engineering 3.66

      Activities and Societies: • Dean List 4th, 5th, 6th,7th, 8th semesters 2014 • 1st place in CREST Pitching on most innovative project 2015 • Contestant in Fire Drill (Malaysia Book Of Record) 2015 • Innovate Malaysia Design Conference (IMDC)- (semi-final) 2015-2016

    • Universiti Teknologi MARA

      2013 - 2016
      Bachelor's degree Electronic Engineering 3.65

      Activities and Societies: Participate in Imdc, mentor to mentee

    • Universiti Teknologi MARA

      2010 - 2013
      Diploma Electrical and Electronics Engineering 3.57

      Activities and Societies: Robotic club, chess

  • Experience

    • Ilsas (TNB)

      Jul 2015 - Sept 2015
      Internship

      Learning with practical on Distribution Power, Transmission on substation and Generation Power such as Turbine, Compressor and NDT.

    • Selangor Human Resource Development Centre

      Nov 2015 - Jul 2016
      Engineer in Training

      Learning with practical on Semiconductor and Testing field which is including LSI Testing, IC Packaging and Testing, Semiconductor Manufacturing Technology, C++ programming skill, ATE and J750 Basic Programming.

    • NXP Semiconductors

      Sept 2016 - Jan 2019
      Product Engineer

      • Increase product gross margin by involve in project (test time reduction, flow elimination, test reduction and elimination and product finance yield improvement).• Perform test optimization for test cost reduce, enhance product quality and improve manufacturing efficiency and accelerate manufacturing stability.• Execute root cause analysis using Fish Bone method, 8D process and FMEA to help debug issue to their root cause and provides recommendation solution.• Perform Test program verification and validation process to ensure test program is robust with the changes before goes into production line.• Execute detail test electrical validation on product and summarize the test result and document the result. • Statistical data analysis (Process capability analysis(CP and CPK), data-log analysis, yield trend analysis, wafer map analysis, Anova and regression)• Handling and dispose Lot On Hold (LOH) with provide solution (data analysis and test improvement) to support customer demand and customer ramp.• Preparing documentation for root cause analysis and provide disposition plan in the technical review board.• Using Automated Test Equipment (Teradyne J750 and Uflex1600). Knowledgeable on how ATE machine works and how to operate to do test debugging and electrical failure analysis.• Analyse and resolve technical issues and challenges in Fab, Probe, Assembly, Test, and Design• Working closely with global product, design, wafer fab process, device engineering and manufacturing teams• Able to edit test program using Visual Basic code • Able to use oscilloscope to analyse behaviour of voltage on certain pins. Show less

    • Intel Corporation

      Apr 2019 - Sept 2019
      Validation Engineer

      • Bench setup for validation and measurement project.• Perform 1.0V I/O std validation and measurement on Altera Max10 device for on SSN (QH and QL)noise, VOH/VOL IOH/IOL DC IV Curve, TX AC Eyediagram, and RX AC VIH VIL for I/O pin on new device with different frequency and voltage input FPGA Board.• Perform 1.0V I/O std validation and measurement on Altera Cyclone IV device for VOH/VOL IOH/IOL DC IV Curve, and RX AC VIH VIL for I/O pin on new device with different frequency and voltage input FPGA Board.• Design IP Core for each measurement test using Quartus II.• Prepared full data analysis and report for each project. Show less

    • Western Digital

      Oct 2019 - now
      Senior Product and Test Engineer

      - involve in early stage during NPI till EOL of the product as Product Engineer and FA. (involve in BICS 4.5, BICS5 and BICS6 NAND flash technology). - Responsible on Product yield improvement to meet yield goal.- Responsible on test time reduction project to increase gross margin.- Perform test program changed and test program checkout validation before release to production line.- Quick response on any production issue or production line down on product under me.- SSD department Lead for IMS Audit document preparation and representative for internal or external Audit.- Knowledgeable on Advantest MPT3K tester and Mustang tester Show less

  • Licenses & Certifications

    • The Great Lab Mini Workshop

      Crest (Collaboration Research In Engineering, Science And Technology)
      May 2015
    • Malaysia University Robot Competitions (MURoC)

      Universiti Malaysia Perlis
      Feb 2011