Saurav Kumar

Saurav Kumar

Trainee

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location of Saurav KumarBengaluru, Karnataka, India

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  • Timeline

  • About me

    Design Verification Engineer @Analog Devices || Ex LFT || Ex Qualcomm ||PCIe || CXL || M.TECH in VLSI DESIGN at National Institute Of Technology Kurukshetra

  • Education

    • National Institute of Technology Kurukshetra

      2021 - 2023
      Master of Technology - MTech VLSI DESIGN 8.00 CGPA
    • Maharaja Surajmal Institute Of Technology

      2015 - 2019
      Bachelor of Technology Electrical, Electronics and Communications Engineering 8.56 CGPA
  • Experience

    • EMTECH FOUNDATION

      Jun 2017 - Jul 2017
      Trainee

      Learn about Embedded system and their Applications

    • Doordarshan Kendra

      Dec 2017 - Jan 2018
      Industrial Trainee

      satellite communications

    • Bharat Sanchar Nigam Limited

      Jun 2018 - Jul 2018
      Internship Trainee

      Works on Mobile Communication,GSM

    • Qualcomm

      Jul 2022 - Jun 2023
      Hardware Intern

      Worked in the Design and verification Team, Got Exposure on CXL Protocol,AMBA Protocols like AHB, APB, AXIWorked on Formal Verification on Cadence Jasper Gold (SEC,FPV)

    • Logic Fruit Technologies

      Jul 2023 - Oct 2024
      Design Verification Engineer

      Worked as CXL/ PCIe Design Verification Engineer

    • Analog Devices

      Oct 2024 - now
      Design Verification Engineer
  • Licenses & Certifications

    • Universal verification Methodology

      Maven Silicon
      Jun 2023
    • System Verilog

      Maven Silicon
      May 2023
    • Embedded system

      Microchip Technology Inc.