Experience

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  Intel corporation

  Aug 2020 - now

  • Key contributor in the Post Silicon Validation team, focusing on the validation of server class chips such as Saphirerapids.• Develop end-to-end test plans, ensuring comprehensive coverage of chip features and functionalities for efficient validation and verification.• Utilize test cases to validate various chip features, diligently documenting and troubleshooting issues encountered during the validation process.• Employ Python scripting to automate repetitive tasks, improving efficiency and accuracy throughout the validation workflow.• Collaborate closely with the Design for Debug (DFD) team, providing valuable insights and feedback to optimize chip performance and debug capabilities.• Successfully owned and managed critical tools like Array Freeze and Scan Dump within DFD, supporting multiple teams and enabling successful debugs.• Achieved zero escalations during silicon power on, demonstrating meticulous planning and execution.• Successfully PRQed multiple chips under my ownership, showcasing attention to detail and expertise in validation.• Transitioned to the Quick Assist Technology IP team, responsible for the verification/validation of globals domains within the IP.• Develop test cases primarily using Python and YAML, ensuring comprehensive testing and validation of the Quick Assist IP.• Skillfully handle clock and reset domains within the globals, ensuring proper synchronization and functionality.• Proficiently work in both silicon and emulation environments, utilizing UNIX expertise for effective execution and debugging.• Conducted several trainings to share knowledge and skills, facilitating the onboarding and development of new team members and interns.• Recognized with the DRA (Distinguished Recognition Award) for exceptional performance and contributions. Show less

  • System Validation Engineer

    Jul 2021 - now

  • Post Silicon Validation Intern

    Aug 2020 - Jun 2021