Cao Binbin

Experience

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  STATS ChipPAC

  Jul 2008 - Jul 2014

  Sr Process Engineer

  Process engineer in Die preparation, SMT & WB.1.Responsible for the routine work of Cu WB BGA product (Qualcomm, Cirrus, etc.) & Ag WB Flash product (SanDisk, etc.), including KnS W/B recipe/parameters optimization & standardization, line issue disposition, identify drifts in quality and adjust production lines/equipment to maintain stable quality, ensure efficiency of the production equipment.2.Responsible for customer audit, manage customer complain, provide customer quality improvement plan & 8D report, analyze Assy product defect & abnormal O/S from Test site & customer return, improve quality & yield, dispose problematical lots/materials, etc.3.Involved in the NPI project, do feasibility study, prepare Control plan, Baseline, SOP and so on, evaluate & qualify product under different machine platform (KnS Ultra/Iconn).4.Responsible for the project of machine evaluation, qualification, UPH/Capacity improvement, etc.5.Responsible for the new material qualification (such as capillary, PCB, etc.) for the cost down project.6.Manage W/B process PCSD projects design, follow-up & implementation.7.Train & coach technicians/operators to build up an empowered, motivated learning team and continuously drive the team performance to next level. Show less

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  SanDisk

  Aug 2014 - Apr 2016

  Sr Package Development Engineer

  1. Responsible for new package platform or deliberative package development.2. Responsible to develop package to secure robust manufacturability, meet quality requirements, reliability, fiance goal, product performance and schedule.3. Hold technical and financial leadership for package development working with project member such like Industrial Engineering, Finance, Purchasing, Process Engineering, QA, Program management, Human resource, Facility, and manufacturing.4. Conduct package development following Advanced Product Qualification Plan (APQP) Spec.5. Study and understand customer requirements, application, EHS and design those things to package development.6. Update process design rules for new/existed devices, focus on 2D/3D Nand/Flash with DDR/ASIC thin die stack-up package development.7. Generate and create development documents assigned to Package Engineering, such like design FMEA, control plan, process FMEA, quick-look ahead reliability(QLA) plan, project charter, Quality function development, project schedule, line certification plan, to identify development cost, etc.8. To plan and execute process optimization, failure analysis, process characterization, samples build for package development.9. To lead project team members to deliver package development goals.10. To find technical and systematic solution for failures of reliability, quality, manufacturability, cost and cycle time.11. To share and update project progress, risk of delay, constraints, daily/weekly review with project team. Show less

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  Amkor Technology

  Apr 2016 - Jun 2021

  Technical Program Manager

  1. Lead a cross-function team (including process, design, simulation, manufacturing, QE, SQE, PUR, etc.) in overall operational readiness on Design/NPI phases leading into Mass Production for WB/WLP/FC devices.2. Collaborate with Suppliers and Engineering teams in developing manufacturing roadmap including process flow, equipment/fixture designs, implementation schedules and validation plans prior to any Engineering build.3. Defines the risks of the project (w.r.t. specs, costs, planning, etc.) and utilize DOE, Control plan, FMEA and other Industry standard tools to proactively identify and address risks and optimize process parameters.4. Drive project technical and operational issues (material, process, fixtures, equipment, etc.) during NPI phase to enable delivery of a mature product and manufacturing process into Mass Production. Provide effective analysis and solution suggestions for line issue/excursion in HVM phase.5. Act as Ops technical leader to ensure project readiness and validate process capability to meet customer requirements.6. Execute and update the Project Management Plan, clearly indicating project deliverables, phasing and control aspects and risk assessment.7. Reports on the progress of the project with an agreed frequency on quality, status, cycle time, output and money to senior management and to the project members.8. Based on customer PKG requirement, evaluate PKG risks, MFG feasibility and provide competitive PKG solution according to Amkor WW PKG line. Show less

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  PhotonIC Technologies (Shanghai) Co., Ltd.

  Jul 2021 - Sept 2024

  Staff Product Engr

  1. Accountable to evaluate OSAT capabilities to select proper supplier based on chip design & package requirement, securing timely execution of tasks meet quality, schedule and reliability requirements.2. Accountable to execute and manage chip package process, including perform package risk assessment, drive material/process simulation in OSAT, optimize subt design and DOE evaluation plan, create package risk mitigation plans, evaluate package tooling design/NRE, track and mange material/tooling procurement and push delivery to meet project progress.3. Mange PKG Qual lot plan in NPI stage, monitor engr/quality results and coach OSAT for process improvement. Initiate yield target, quality/ORT/Reliability monitor plans in LVM/HVM stage.4. Accountable for chip quality system management, including initiate packaging control plan, baseline, SOP, SPC, PCN, etc, perform regular audit plan for OSAT, ensure shipment meet quality/cycle time/capacity requirements.5. Accountable to prepare and execute Chip level reliability items (ESD/LU/HTOL) & PKG level reliability items (PC/TC/HAST/HTS), lead a cross-function team to create reliability plans, guide reliability labs to ensure set-up results meet design specs.6. Track readout test and data analysis for Chip/PKG level reliability items, coach FA labs for failure sample analysis plans, find the root cause and provide chip design improvement plans. Show less