Matthew Plavcan

Matthew Plavcan

Electrical Engineering Intern

Followers of Matthew Plavcan528 followers
location of Matthew PlavcanPortland, Oregon, United States

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  • Timeline

  • About me

    Engineering Technical Coach, Software / Hardware Technical Lead

  • Education

    • University of Illinois at Urbana-Champaign

      1993 - 1997
      Bachelor of Science (B.S.)
  • Experience

    • Compaq Computer Corporation

      Jun 1995 - Aug 1995
      Electrical Engineering Intern

      Intern with Performance Laptop Expansion group• Learned memory controller protocols for Synchronous DRAM• Drove SO-DIMM as JEDEC standar for laptop memory expansions• Designed and constructed hot-pluggable laptop drive bay (non-assigned project)

    • University of Illinois at Urbana-Champaign

      Jan 1996 - Aug 1997

      Class Instructor, ECE 291 (Computer Engineering II)Providing an introduction to computer architecture and low-level programming to engineering students.• Presented course lecture material on Intel x86 assembly-language and PC architecture• Wrote exams and lab programming exercises• Supervised Teaching Assistants Engineering Teaching Assistant, ECE291 (Computer Engineering II)Supporting engineering students in learning computer architecture and low-level programming concepts.• Authored new course material for: coding techniques, abstracting low-level hardware control• Supported students for lab programming exercises• Graded exams and labs

      • Instructor

        Jun 1997 - Aug 1997
      • Teaching Assistant

        Jan 1996 - May 1997
    • Compaq Computer Corporation

      Jun 1996 - Aug 1996
      Electrical Engineering Intern

      Intern with Performance Laptop Expansion group• Debugged logic and timing design of laptop docking station PCBs.• Created software for programming unique ID in memory module production line.• Evaluated high-performance networking options for future expansion accessories.

    • Intel Corporation

      Aug 1997 - Jul 2016

      Created Intel Innovation Hub: A place inside Intel where employees imagine, innovate, and create without the limits that the bureaucracy of a large company place on employees; A showcase of Intel technology providing social good to the outside world• Mentored individuals in use of Arduino devices, 3D-printing, laser-cutters, and general electronics• Supported hackathon events outside the Hub and Intel, including Stanford's Treehacks• Maintained and managed computer and Maker equipment in Hub Show less Enterprise coach responsible for guiding software and hardware development organizations to launch and sustain transformations through Agile, Lean techniques• Instructed and promoted teams adopting XP software practices: Test-Driven Development, Refactoring, Source Control, Continuous Integration, Continuous Delivery• Mentored senior developers in behavioral aspects of software development• Developed and deployed company-wide Coderetreat and Code Dojo program for software skill practice; Trained event facilitators• Organized and led cross-company community of practice for software skill development (Software Academy) Show less Software developer / Hardware logic verification for lead microprocessor products: Nehalem/Westmere (Core i7)• Root-caused and guided closure of post-silicon logic failures gating product release• Identified significant gap in architectural specification, created corporate standard used by all microprocessor product teams• Supported and enhanced memory execution test environment for team of ~10 engineers• Supported and enhanced bus-functional model of Common Systems Interface for team of ~15 engineers Show less Software developer / logic verification for memory execution cluster in lead microprocessor product: Nehalem (Core i7)• Architect and lead developer for a new test generator used by ~10 engineers• Created and published an extensive methodology for root-causing, filing, tracking, and closing bugs for entire organization. Foundation still used and referenced as of 2018• Extended the simulation test environment for the "memory execution" cluster, covered for owner during their sabbatical Show less Verification engineer for pre/post-silicon in multiple functional units / debugging of full-chip failures in lead microprocessor products: Willamette/Northwood/Prescott (Pentium 4)• Led logic verification of critical late release-gating memory-ordering post-silicon bug• Debugged slow timing paths in using Laser Voltage Probing of silicon• Trained design team to create x86-assembly based tests for silicon structural testers• Created coverage analysis for tests of silicon signal noise conditions• Extended common memory "cluster" random testing tool• Prototyped pseudo-simulation of hardware conditions to create more effective fullchip tests Show less Pre-silicon Logic verification engineer of two functional units for lead microprocessor products: Willamette/Northwood (Pentium 4)• Ran random testing and coverage-based analysis of instruction decode and trace cache logic• Enhanced testing environment accuracy, resulting in the discovery of several difficult-to-find bugs• Drove adoption of knowledge and methods sharing among team• Enhanced coverage automation tools to ease strain on testing team• Built software testing libraries to promote common test base abstraction across developers Show less

      • Intel Innovation Hub Steward

        Jan 2016 - Jul 2016
      • Enterprise Technical Practices Coach

        Dec 2012 - Jul 2016
      • Staff Component Design Engineer

        Jul 2012 - Nov 2012
      • Staff Component Design Engineer

        Jul 2011 - Jun 2012
      • Senior Component Design Engineer

        Jan 2009 - Jun 2011
      • Senior Component Design Engineer

        Jan 2007 - Dec 2008
      • Senior Component Design Engineer

        Nov 2004 - Dec 2006
      • Senior Hardware Validation Engineer

        Mar 2000 - Nov 2004
      • Pre-silicon Hardware Validation Engineer

        Aug 1997 - Mar 2000
    • (none)

      Aug 2016 - Feb 2017
      Personal Sabbatical

      Refreshed perspective, relaxed, retooled.

    • Tacit Focus, LLC

      Mar 2017 - now
      Engineering Technical Coach

      Enterprise transformation and technical practices adoption for software and hardware.Building coaches and development teams.Improve your organization's capabilities:• Continuous Delivery• Incremental / Iterative Features• Test-Driven Development• Refactoring• Continuous Integration• Process ImprovementAre you looking for more than an individual to address your company's needs?I work with the following organizations to assemble a coaching team to meet your needs: - Nerd/Noir - Cprime - Industrial Logic - Odd-e Show less

    • VR Motion

      Sept 2017 - Jun 2022
      Chief Technology Officer

      Improving commercial, law enforcement, and military driver training through virtual reality simulation.• Product roadmap • Customer relations• Team culture and hiring• Technology readiness• Product architecture• Software/hardware integration• Product implementation

    • Nerd/Noir

      Feb 2023 - now
      Senior Coach
  • Licenses & Certifications

    • Certified Scrum Developer

      Scrum Alliance
    • Certified Scrum Master

      Scrum Alliance
    • Ready to Coach

      Dojo Academy
      Sept 2021
  • Volunteer Experience

    • Facilitator

      Issued by Coderetreat on Dec 2013
      CoderetreatAssociated with Matthew Plavcan
    • Global Organizer

      Issued by Coderetreat on Jun 2015
      CoderetreatAssociated with Matthew Plavcan
    • Race Driving Instructor

      Issued by CASCADE SPORTS CAR CLUB INC. on Mar 2018
      CASCADE SPORTS CAR CLUB INC.Associated with Matthew Plavcan
    • Senior Instructor

      Issued by OJUKAN JUDO DOJO, INC. on Dec 2004
      OJUKAN JUDO DOJO, INC.Associated with Matthew Plavcan