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REVATI RANJAN

REVATI RANJAN

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location of REVATI RANJANBengaluru, Karnataka, India

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  • Timeline

  • Skills

    Vlsi
    Fpga
    Vhdl
    Verilog
    Embedded systems
    C
    Rtl design
    Static timing analysis
    Systemverilog
    Asic
    Soc
    Microcontrollers
    Logic synthesis
    C++
    Debugging
    Very large scale integration
    Field programmable gate arrays
    Application specific integrated circuits
    System on a chip

  • About me

    Experienced Senior Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Field-Programmable Gate Arrays (FPGA), Verilog, System on a Chip (SoC), and Application-Specific Integrated Circuits (ASIC). Strong engineering professional graduated from CDAC ACTS PUNE.

  • Education

    • CDAC ACTS PUNE

      2012 - 2012
      PG DIPLOMA IN VLSI DESIGN A

    • DAV PUBLIC SCHOOL

      2004 - 2006
      XII PCM A

    • DAV PUBLIC SCHOOL

      2003 - 2004
      X A

    • Guru Gobind Singh Indraprastha University

      2007 - 2011
      Bachelor of Technology (B.Tech.) ELECTRONICS AND COMMUNICATION ENGG. A

  • Experience

    • Agiliad

      Aug 2012 - Dec 2016

      RTL Design, coding in verilog for FPGA. Synthesis and Timing Analysis. Board Level dubugging , Technical Documentation, Pin planning. Verilog coding, Changing the code according to new requirements and writting new ones. Pin planning. Board bring up routines development and debugging. Synthesis and Timing Analysis. Technical documentation.

      • VLSI DESIGN ENGINEER

        Aug 2012 - Dec 2016

      • Sr. Hardware Engineer

        Aug 2012 - Dec 2016

    • L&T Technology Services

      Dec 2016 - Jul 2017
      Sr. Design Engineer

    • NXP Semiconductors

      Jul 2017 - Feb 2019
      Design Engineer lead II

    • Cientra

      Feb 2019 - May 2021
      Member Of Technical Staff - Design

    • Intel Corporation

      May 2021 - now
      SoC Design Engineer

  • Licenses & Certifications