
Paul Wang
Telecommunication Labs

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About me
Senior Manager at Quanta Computer
Education

Chung Yuan Christian University
1982 - 1986Bachelor's degree Electrical Engineering
Syracuse University
1989 - 1991Master of science Electrical EngineeringActivities and Societies: Chinese Student Association
Experience

Chunghwa Telecom
Jan 1991 - Jun 1998Telecommunication LabsAssistant Researcher, Telecom Laboratories of Chunghwa Telecom.1. DS1 MAPPER designs for SONET ADD Drop Multiplexer. The ASIC provided T1 interfaces which mapped 4 DS1 signals to four TU11 and multiplexed them to VT group. It was implemented by VHDL design methodology. The synthesis tool was Design Complier from SYNOPSIS and fabricated by LSI logic, USA.2. PHASE LOCK LOOP techniques: The jitter performance improved and conformed to ITU G.824 Jitter specifications by adding adaptive phase locked loop algorithms to DS1 Mapper. The Algorithm was verified in CPLDs from ALTERA Corporation. The ASIC was designed in VHDL methodology and fabricated by Faraday Technology Corp. in Taiwan. 3. T1 TRIBUTARY CARD for SONET project. 4 Channel T1 interface card for OC-3 ADM project. The major chip was the DS1 Mapper developed by previous project.4. TECHNICAL PAPER published in Telecoms Technical Quarterly of Chunghwa Telecom. 5. TECHNICAL SPECIFICATION for Fractional E1 equipments. This specification was one of theprocurement documents for Chunghwa Telecom. Test bed was implemented to evaluate theperformance of products from vendors. Show less

Telways Communications Co.
Jan 2000 - Jan 2014Co-Founder & RD Director1. 10G CARRIER ETHERNET switch. The product provided IEEE 1588V2, Ethernet OAM( Y.1731/ 802.1ag), and protection switch(G.8032) functions for LTE Mobile backhaul applications.2. FPGAs for 3G MOBILE BACKHAUL applications: As key components to Fiber Optical Modem products. Em-beded Serdes, PLLs, DDR interfaces, and dual port RAMs were utilized to speed up the design process. SDH framing/scrambling and G.7041 GFP frame delineation method were implemented to carry wire-speed Ethernet signals and PDH signals . The aggregation rate for Fast Ethernet was 144MHz and 1.44G for Gigabit Ethernet applications. Optical protection switch was provided to increase the service availability. 3. FIBER OPTICAL MODEM hardware design and integration tests: 3 models were developed with hot-insertion tributary cards for 3G Mobile backhaul applications, which including low speed (T1/E1/V.35/FXO/FXS) and Gigabit Ethernet interfaces. Operating temperature may be required to 65 degree celsius by some customers.4. MEDIA CONVERTER for FTTB applications: Provide Ethernet 100Base-TX to 100Base-FX conversion with racked and standalone types. All product conformed to EN-55022 and IEC-61000-4-5 standards. CE mark was also certified. 5. Gigabit Media Converters: Expand tributary interfaces on Rack system and evolved to standalone types of Gigabit media converters to meet ODM requests from domestic and overseas customers. The products conformed to MEF9 and provided part of IEEE 802.3ah OAM functions.6. Certification of ChungHwa Telecom procurements: Media Converter Tenders of ChungHwa Telecom. 7. DSLAM project. A racked type equipment which linked to ADSL CPEs.The capacity was 64 links with POTS splitter included in system.The prototype was developed and exhibited to customers in 18 months.8. RECRUITMENT of Hardware and Software Engineers: Teamed up and training for required knowledge of 14 engineers for DSLAM project. 9. FUND RAISING: Initial Run for 6.6 Million US dollars. Show less

Quanta Computer Inc. 廣達電腦
Jan 2014 - nowSenior ManagerProject management for Data center networking products.1. 40G/100G platform solutions and beyond.2. Product developments and testing. 3. Advanced PCB materials use experience and testing. 4. Networking architecture in Data center.
Licenses & Certifications

Engineering personnel for high level telecommunication
Jan 1997
Languages
- enEnglish
- taTaiwanese
- maMandarin
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