Sunil Baliga

Experience

• 

  IBM Global Services

  Jun 2004 - May 2006

  Software Engineer

  Worked as an SAP Technical Consultant for SAP 4.6C development and implementations.Experience in the SD, FI, MM and PM modules and IDoc methodology.

• 

  Arizona State University

  Jan 2007 - Aug 2011

  Graduate Research Associate

  1. Fabrication and characterization of solid electrolyte memory devices.2. Process design for flexible substratesI work at the Center for Applied Nanoionics.

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  Intel Corporation

  Sept 2011 - now

  Developed supplier manufacturing process for innovative substrates for semiconductor packages with experience in lamination, lithography, etch, rinse, and metal deposition. Delivered yield, electrical characteristics, reliability, and process capability for the substrates.Managed product development schedules at supplier to ensure timely delivery of product capability, yield, reliability, and assemblyPlanned and executed startup on new supplier factories by managing introduction of new toolsets to required schedule and factory clean room class and layout setupIntroduced and designed aspects of neural network systems to monitor electrical and visual defect performance on productsIntroduced machine-vision AI system for monitoring resulting in 14% reduction in defect analysis time requirement across factory Show less Improved product timeline delivery system by ~7% by parallelizing execution of independent processes with projects and improved planning of pre-workEnabling capex > 4M units and enabling > 4B in revenue by pulling in a new supplier factory startup by 2Q with full line capability and ensuring good quality and reliability performanceDecided tool purchase, installation and qualification criteria based on new process flows and KPIs, resulting in a ~4% reduction in new factory footprintDelivered product milestones and schedules across geographies as product moved from the pathfinding/TD phase to the HVM phaseCoordinated product management and process improvement deliverables across multiple, cross-functional, international teams and ensured delivery of targets on scheduleEnabled startup of new supplier factories by aligning factory milestones and KPIs with customer requirements to required technology and product NPI milestones, while establishing robust change control and quality management procedures Show less Developed manufacturing processes for the 22 nm, 14 nm and 10nm semiconductor nodes with experience in integration of lithography, dielectric and metal deposition, electroplating, CMP and plasma etch tools.Delivered yield, electrical characteristics, reliability and process capability for BEOL processes. Optimized reliability of the Chip-package interface by analyzing Assembly-Silicon process/test interactions and providing solutionsOptimized multiple process segments through independent definition of experiments and result analysis to achieve process capability, yield and reliability goals Show less

  • Sr. Packaging R&D Engineer

    Oct 2015 - now

  • Supplier Program and CapEx Manager

    Feb 2019 - Dec 2024

  • Process TD Engineer (Integration)

    Sept 2011 - Oct 2015