Jia Yang Hor

Jia Yang Hor

Political Intern

Followers of Jia Yang Hor236 followers
location of Jia Yang HorSeremban, Negri Sembilan, Malaysia

Connect with Jia Yang Hor to Send Message

Connect

Connect with Jia Yang Hor to Send Message

Connect
  • Timeline

  • About me

    IC Design Engineer

  • Education

    • Universiti Teknologi Malaysia

      -
      Associate's degree electronic systems engineering
    • MALAYSIA-JAPAN INTERNATIONAL INSTITUTE OF TECHNOLOGY (MJIIT)

      2019 - 2023
      Associate's degree Electronic 3.89

      Aktiviti dan Persatuan:Best FYP award

  • Experience

    • Democratic Action Party (Malaysia)

      Jun 2019 - Jan 2019
      Political Intern
    • SkyeChip

      Jul 2022 - Jan 2022
      IC design Frontend Engineer
    • SkyeChip

      Jan 2023 - now
      RTL design engineer

      I specialize in Register Transfer Level (RTL) design with a focus on Network on Chip (NoC) architectures. My expertise includes designing, verifying, and optimizing IC design for high-performance chips. I work closely with software and design verification teams on NoC projects, ensuring seamless integration and robust performance.

  • Licenses & Certifications

    • Innovate Malaysia Design Competition 2022

      DreamCatcher Consulting
      Aug 2022
      View certificate certificate
    • Innovate Malaysia Design Competition 2022

      DreamCatcher Consulting
      Aug 2022
      View certificate certificate