Talk to sales Try for Free
Shreyansh Mathur

Shreyansh Mathur

Digital Logic System Design Trainee

Followers of Shreyansh Mathur489 followers
location of Shreyansh MathurLucknow, Uttar Pradesh, India

Connect with Shreyansh Mathur to Send Message

Connect

Connect with Shreyansh Mathur to Send Message

Connect

  • Timeline

  • About me

    FPGA Design Engineer at Aujus Technology

  • Education

    • Manipal Public School

      2018 - 2019
      12 PCM 10 CGPA

    • Manipal Public School

      2017 - 2018
      10 PCM 9 CGPA

    • Shri Ramswaroop Memorial Group of Professional Colleges, Lucknow

      2019 - 2023
      Bachelor of Technology - BTech Electronics and Communication Engineering

  • Experience

    • PinE Training Academy

      Sept 2021 - now
      Digital Logic System Design Trainee

      Learning how to fabricate digital system designs using hardware description languages Verilog. I am currently working on Digital Traffic Light Controller Design.Completed :- 4 Bit Signed Calculator that can : Add, Subtract, Multiply, Divide 4 Bit Binary Numbers (Combinational Circuit)- 100 MHz to 1 Hz frequency Divider Circuit (Sequential Circuit)

    • Aujus Technology Private Limited

      Sept 2023 - now
      FPGA Design Engineer

  • Licenses & Certifications