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Vijay Gupta

Vijay Gupta

Mixed signal Design Engineer

Followers of Vijay Gupta141 followers
location of Vijay GuptaBengaluru, Karnataka, India

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  • Timeline

  • Skills

    Mixed signal
    Analog circuit design
    Analog
    Ic
    Pll
    Cmos
    Vlsi
    Serdes
    Low power design
    Spectre
    Cadence virtuoso
    Semiconductors

  • About me

    ... at AppliedMicro. Location: Bengaluru Area, India; Industry: Semiconductors ... Education. Indian Institute of Technology, Madras ... Staff Engineer · Teranetics ... Engineering Manager, Analog and Mixed Signal IP at Synopsys India Pvt Ltd...

  • Education

    • Indian Institute of Technology, Madras

      1997 - 2001
      Bachelor of Technology (B.Tech.) Electrical and Electronics Engineering

  • Experience

    • Texas Instruments

      Jul 2001 - Oct 2003
      Mixed signal Design Engineer

      Designed 12-bit 10 MSPS SAR ADC for touch screen application. Worked on 16-bit SAR ADC improvement.

    • ST Microelectronics

      Dec 2003 - Mar 2005
      Associate Design Engineer

      Designed 16-bit 1 KSPS Incremental ADC for battery monitoring.

    • Texas Instruments

      Apr 2005 - Jan 2007
      Senior Mixed Signal Design Engineer

      Worked on Bipolar opamp for driving 16-bit ADC. Worked on 14-bit 125 MSPS ADC.

    • PMC-Sierra

      Jan 2007 - Sept 2008
      Design Engineer Level III

      8-bit 50 MSPS SAR ADC. Worked on speed improvements of PLL blocks.

    • Teranetics (now PLX technology)

      Oct 2008 - Mar 2012
      Staff Engineer

      Designed complete10.3125 Gb/s RX for 10GBase-KR. Designed 9-bit 3.5 GSPS DAC.

    • PLX Technology

      Apr 2012 - Oct 2012
      Manager, Analog Engineering

      Worked on porting the 10.3125 GSPS RX from 40nm to 28 nm.

    • AppliedMicro

      Oct 2012 - Mar 2016
      Manager II, Analog Design

      Designed 16 GSPS DAC from scratch.Designed 8-bit, 66 GSPS DAC design. Worked on 10 Gb/s SerDes design. Designed 4 GHz PLL in 40nm and 28nm.

    • Acacia Communications Inc.

      Mar 2016 - Feb 2017
      Senior Design Engineer

      Worked on > 60 Gsps DAC design.

    • Educational Institution

      Mar 2017 - Jan 2019
      Self Employed

      Nanodegree courses on Machine learning, Deep learning, Reinforcement learning. Learned many other CS courses. Worked on automating data gathering, cleaning, analysis, ppt generation for clinical trials.Tried Reinforcement learning on automated trading.

    • SiFive

      Feb 2019 - Oct 2022
      Senior Manager

    • Si-Hive

      Oct 2022 - now
      Director

  • Licenses & Certifications