Adam Rubin

Experience

• 

  Intel Corporation

  Jul 2000 - Aug 2014

  • Responsible for the design of several DDR families Analog Front End in CPU/SoC projects.• Possession of fundamental knowledge of the DDR family physical layer (PHY) such as LPDDR3/4 & DDR3/3L/4.• Definition of timing and electrical specification parameters of the interface’s circuits for optimal performance and power consumption.• In charge of full design and simulation of circuits in pre-silicon stage and testing and verification in the post-silicon stage (identification of the problem’s root cause, and providing a solution using a wide range of tools).• Holder of a registered US Patent 7629830 for one of the Transmitter sub-circuits. Show less

  • DDR PHY AMS Circuits Team Leader

    Feb 2014 - Aug 2014

  • I/O AFE Senior Design Engineer

    Jul 2007 - Jan 2014

  • Circuit Design Engineer

    Jul 2003 - Jul 2007

  • Circuit Design Student

    Jul 2000 - Jul 2003
• 

  Apple

  Aug 2014 - now

  • Senior Manager, Analog Mixed Signal IC Design at Apple

    May 2023 - now

  • Manager, Analog Mixed Signal IC Design at Apple

    May 2019 - May 2023

  • Senior Circuit Designer and PHY Architect

    Aug 2014 - Apr 2019