Tarun Kausthub Baru

Experience

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  Bramhansh Technologies

  Feb 2023 - Jun 2023

  Electronics Intern

  Analysed complex datasheets.Reverse engineered existing processes, and successfully replicated the functionality of existing work.Assisting my Manager in debugging issues during prototyping.

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  Maven Silicon

  Sept 2023 - Apr 2024

  Physical Design Trainee

  Learnt and Worked on the following:1. Digital Design concepts[ FSM | Memories | Sequential Circuits | Combinational Circuits | Logic Gate Circuits ]2. Verilog [ Data Types | Compiler Directives & Systems Tasks | Assignments | Verilog Synthesis | finite State Machines ]Tool used: ModelSim3. CMOS[ MOS Fundamentals | MOS IV Characteristics | CMOS Inverter Design | CMOS Design | Layout & Stick Diagrams ]Tool used: Siemens - Tanner4. Physical Design[ Synthesis | Floorplan | Placement | Clock Tree Synthesis | Routing ]Tools used: Fusion Compiler, Design Compiler, IC Compiler5. Static Timing Analysis[ False Path | Multicycle Path | Types of Clock | Clock Uncertainties | Slack | Setup & Hold Time | Timing Paths | Timing Improvements ]Tool used: PrimeTime Show less

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  Synopsys Inc

  Jul 2024 - now

  Applications Engineer Intern