
Rishab Vyas Mahendra
Embedded Systems Trainee

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About me
Actively Seeking a Full time Job in CPU/FPGA/SoC/RTL/Digital/ASIC Design Engineer, Design Verification Engineer, CPU/FPGA/SoC/RTL/ASIC Verification Engineer, Layout Design roles | MS-Computer Engineering, UMass Lowell.
Education

DAYANANDA SAGAR ACADEMY OF TECHNOLOGY AND MANAGEMENT, BANGALORE
2016 - 2020BE - Bachelor of Engineering Electronics and Communication Engineering
University of Massachusetts Lowell
2022 - 2023Master's of Science Computer Engineering 3.83
Experience

Pragmatic Embd Solutions
Aug 2018 - Sept 2018Embedded Systems Trainee-A manufacturer and supplier of Electronics components and provider of PCB Design Software and ERP Web Services, with annual turnover of INR 50 lacs and ~50 employees• Learnt about Embedded C, Arduino microcontrollers and their practical implementation through Real-Time Industrial Projects.

VI Solutions, Bangalore
Jul 2019 - Aug 2019LabVIEW Trainee-A leading Automation company providing Advanced Communication Systems, Real Time Embedded Systems and other Industrial Automation services for applications in Defence, Aerospace and Educational Institutions.• Obtained hands-on experience on LabVIEW and its practical implementation through projects.• Learnt to implement projects using myDAQ and myRIO for real-world solutions.

University of Massachusetts Lowell
Sept 2022 - Dec 2022Senior Lab / Course Assistant (SLCA), VLSI Design Lab• Supervising VLSI Design lab.• Gain proficiency with the lab and equipment• Coordinating with students while performing the experiment. Interacting with them when questions are raised; grade their lab work.
Licenses & Certifications
- View certificate

Basic Static Timing Analysis v3.0
Cadence Design SystemsMay 2024 - View certificate

SystemVerilog Assertions (SVA) for Newbie
UdemyFeb 2024 - View certificate

SystemVerilog for Verification Part 1: Fundamentals
UdemyNov 2023 - View certificate

Master of Science in Computer Engineering
University of Massachusetts LowellFeb 2024 - View certificate

Design for Test Fundamentals v4.0 Exam
Cadence Design SystemsFeb 2024 - View certificate

SystemVerilog Functional Coverage for Newbie
UdemyFeb 2024 - View certificate

Verified International Academic Qualifications
World Education ServicesAug 2021
Honors & Awards
- Awarded to Rishab Vyas MahendraStudent Project Programme (SPP) 43rd Series (state-level UG project competition) Karnataka State Council for Science & Technology and Indian Institute of Science, Bengaluru Aug 2020 Project : Sign Language Assisting Embedded System • I led my team and our project was the only one out of 25 teams from our ECE department to be selected to participate in a state-level undergraduate project competition.• Received funding worth Rs. 5000 by Karnataka State Government, we competed against 100 teams from different colleges all over the state.
- Awarded to Rishab Vyas MahendraElectro Blast Tech Fest Department of Electronics and Communication Oct 2018 Secured 1st position (among 20 teams) for Mini project on Articulated Robotic ARM
- Awarded to Rishab Vyas MahendraElectro Blast Tech Fest Department of Electronics and Communication Oct 2017 Secured 1st position (among 15 teams), E-Circuit Building
Languages
- hiHindi
- enEnglish
- maMarwari
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