Dr. Usha Mehta

Dr. Usha Mehta

Research And Development Engineer

Followers of Dr. Usha Mehta7000 followers
location of Dr. Usha MehtaAhmedabad, Gujarat, India

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  • Timeline

  • About me

    Professor and Head, Electronics and Communication Engineering Department, Institute of Technology, Nirma University, Ahmedabad, Gujarat, India

  • Education

    • Nirma University, Ahmedabad, Gujarat, India

      2003 - 2005
      Master of Technology (M.Tech.) VLSI Design A+
    • Nirma University, Ahmedabad, Gujarat, India

      2009 - 2011
      Doctor of Philosophy (Ph.D.) VLSI Design andTest

      Activities and Societies: VLSI Society of India, IEEE To handle design complexity and short time-to-market, it is increasingly common to use modular design approach in SoC. Such IP cores with hidden architecture have further exaggerated the two burning issues for fabrication testing of SoC: the test cost and test power. The cost of test is strongly related to the increasing test-data volumes which lead to longer test application times and larger tester memory requirement. The solution to this is test data compression. The increasing test power… Show more To handle design complexity and short time-to-market, it is increasingly common to use modular design approach in SoC. Such IP cores with hidden architecture have further exaggerated the two burning issues for fabrication testing of SoC: the test cost and test power. The cost of test is strongly related to the increasing test-data volumes which lead to longer test application times and larger tester memory requirement. The solution to this is test data compression. The increasing test power leads to system reliability issues. The dynamic power during scan operations plays a major role in overall test power. This dynamic scan power is directly related to the number of transitions during scan-in and scan-out. Here, the ‘test data compression’ and ‘switching activity reduction’ issues in context of ‘hidden structure of IP cores’ are addressed. Show less

    • Dharmsinh Desai Institute of Technology

      1990 - 1994
      B.E. EC First Class with Distinction
  • Experience

    • Videocon Industries Ltd

      Feb 1995 - Dec 1995
      Research And Development Engineer
    • Amess Controls Private Limited

      Jan 1996 - Nov 1999
      Production Manager
    • L.D. College of Engineering

      Jul 2000 - Oct 2000
      Visiting Lecturer
    • Nirma University, Ahmedabad, Gujarat, India

      Jan 2001 - now

      As Post Graduate Coordinator, some major aspects of my role are • to effectively link the students with Post Graduate Teachers, Department Head and Institute Head, Alumni, Other reputed academic and research organization and Industry• to ensure that students and faculty in Program understand and follow the relevant regulations so that students are able to successfully complete their degree on time with minimum administrative distraction.• to be very well familiar with UGC, AICTE and University rules and regulations related to students and academic administration• to take necessary actions such that the students are getting the state-of-art knowledge related to area through various means like organizing expert lectures, seminars, industrial visits, conferences, syllabus reforms etc.• to know the students enrolled in PG program, track their progress, to advise and mentor them during internship and placement activities• to look after the effectivity of new/early career supervisors• to put the best efforts for placement of students Show less As IQAC Coordinator, some of my activities are:@To coordinate the overall quality of academic activities at Institute as per the guidance of Director@To conduct the IQAC meetings to review the quality standards of academic activities @To coordinate and finalize the documentation preparation for the National Assessment and Accreditation Council @To coordinate and finalize the documentation preparation for the National Institute Ranking Framework@To coordinate and finalize the documentation preparation for application of the Gujarat State Institute Ranking Framework@To coordinate and finalize the documentation preparation for application of the Center of Excellence Show less

      • Head of Department

        Sept 2022 - now
      • Member of Academic Council

        Jan 2020 - now
      • Post Graduate Coordinator (VLSI Design)

        Jan 2020 - now
      • Coordinator - Internal Quality Assurance Cell

        Jan 2018 - now
      • Board Member of Faculty of Doctoral Studies & Research

        Jan 2019 - now
      • Professor (EC- VLSI Design)

        Jul 2013 - now
      • Associate Professor

        Sept 2008 - Jul 2013
      • Assistant Professor

        Sept 2005 - Aug 2008
      • Lecturer

        Jun 2001 - Aug 2005
      • Visiting Lecturer

        Jan 2001 - Jun 2001
  • Licenses & Certifications

    • 2023 IEEE Membership Outstanding Recruitment Performance

      United Latino Students Association
      Aug 2023
      View certificate certificate
    • 2023 IEEE Membership Outstanding Recruitment Performance

      United Latino Students Association
      Aug 2023
      View certificate certificate
  • Volunteer Experience

    • Executive Committee Member, Gujarat Chapter

      Issued by VLSI Society of India (VSI) on Mar 2022
      VLSI Society of India (VSI)Associated with Dr. Usha Mehta
    • Membership Development Chair

      Issued by IEEE Gujarat Section on Jan 2022
      IEEE Gujarat SectionAssociated with Dr. Usha Mehta
    • Associate Editor

      Issued by Institution of Engineering and Technology (IET), Journal of Computer and Digital Techniques on Mar 2017
      Institution of Engineering and Technology (IET), Journal of Computer and Digital TechniquesAssociated with Dr. Usha Mehta
    • Academia and Research Track Chair (ART Chair) at 6th Edition Of IEEE International Test Conference - India

      Issued by International Test Conference India on Jan 2022
      International Test Conference IndiaAssociated with Dr. Usha Mehta
    • Publicity Chair

      Issued by 26th International Symposium on VLSI Design and Test (VDAT-2022) organized at IIT Jammu on Jan 2022
      26th International Symposium on VLSI Design and Test (VDAT-2022) organized at IIT JammuAssociated with Dr. Usha Mehta
    • Chapter Coordinator

      Issued by IEEE, Gujarat Section on Jan 2020
      IEEE, Gujarat SectionAssociated with Dr. Usha Mehta
    • Secretary

      Issued by IEEE, Gujarat Section on Jan 2019
      IEEE, Gujarat SectionAssociated with Dr. Usha Mehta
    • Chair, Women-In-Engineering Affinity Group

      Issued by IEEE, Gujarat Section on Aug 2015
      IEEE, Gujarat SectionAssociated with Dr. Usha Mehta
    • Fellowship Chair

      Issued by VLSI Design Conference 2023 on Jun 2022
      VLSI Design Conference 2023Associated with Dr. Usha Mehta