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Jet Li

Jet Li

Power integrity engineer

Followers of Jet Li668 followers
location of Jet LiShanghai, China

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  • Timeline

  • About me

    英特尔 - Senior Signal Integrity Engineer

  • Education

    • Central South University

      2001 - 2005
      Bachelor of electronic Information Science and Technology

  • Experience

    • Foxconn

      Jul 2005 - Jun 2008
      Power integrity engineer

    • Datang Mobile

      Jun 2008 - Jul 2010
      Interconnect design & Signal integrity engineer

    • Huawei Technologies

      Jun 2010 - Jul 2014
      Signal Integrity Engineer

    • Celestica

      Oct 2014 - Mar 2017
      SI leader

      Be responsible for SI design of storage, commons, and server products, The evaluation consist of analyzing the high speed interfaces, i.e. PCIE, SAS, 10G-KR, 100G-KR4, etc, and evaluating the topology and timing margin of the parallel bus, i.e. RGMII, DDR3, DDR4, MII, LBS, GMII etc.

    • 英特尔

      Mar 2017 - now
      Senior Signal Integrity Engineer

  • Licenses & Certifications

    • PMP

      PMI-MG - Project Management Institute Brazil, Minas Gerais Chapter
      Mar 2019
      View certificate certificate

  • Honors & Awards

    • Awarded to Jet Li
      优秀PCB设计奖 华为 June 1, 2014