
Prashant Patil
DSP - Embedded Engineer

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About me
Machine Learning @ Lattice Semiconductor
Education
.webp)
COEP (College of Engineering, Pune)
2000 - 2004Bachelor of Engineering - BE Electronics and Telecommunications Engineering First class with distinction
COEP Technological University
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Experience

Conquest Integrated Technologies
Feb 2005 - Nov 2005DSP - Embedded Engineer1. Image processing algorithms like JPEG.2. Video codec development (H.264) and optimizations for TI C64x+ DSP

Trinity Convergence
Dec 2005 - May 2010Senior Software Engineer1. H.264 video encoder/decoder developmentand optimization on TI DSP platforms such asTI C64x+ DSP.2. Video codecs development (MPEG-2/4, H.264,H.263) and streaming containers likeMPEG2TS, MP4 etc.3. Media Playback System Design andimplementation.

Persistent Systems
Jun 2010 - Jan 2012Module Lead1. Developing skype v2ip framework stack backend.2. Integration for video and audio codecs intoskype backend.3. Video conferencing features implementationand testing4. RTP packetizer implementation foraudio/video streaming in skype5. AEC integration and testing into skypebackend

Imagination Technologies
Dec 2011 - Oct 2023Staff Software Engineer1. Spearheaded the development of AI/ML CNN compilers for dedicated Neural Network Accelerator hardware IP, resulting in improved performance and efficiency. - Design and development of graph manipulation features of the compiler - Layers fusion for better optimization. - Layer splitting (Eltwise/Convolutiom/Pooling) to fit into hardware pass. - Optimizer enhancements to decide the best splits - Network segmentation (hardware/software) - IO/Internal formats decisions for layer groups - Hierarchical CnnModel design and implementation - Fixing accuracy issues for classification/ssd networks - Netowrk Performance (Inferences Per second) enhancements - End-to-End network mapping to the NNA hardware - Porting different networks from mutiple framworks such as Tensorflow, TFLite, Caffe etc. - Graph optimization for performance and bandwidth - Quantized networks support in NNA compiler - LSTM/WLM networks support in NNA compiler - Harware adapter to create command stream to run on NNA hardware - Customer support to fix accuracy & Performance2. Worked on the design and development of V2IP Framework.3. Developed and optimized the C reference code for H.264/H.265 video codecs, achieving 30 FPS performance improvement on multiple platforms like ARM (NEON), Intel SSE3 and MIPS MSA.4. Contributed to the development of OpenMax plugins for in-house developed video codecs, enhancing the functionality and compatibility of the software5. Played a key role in implementing MIPS MSA (SIMD) optimizations for AOSP, improving the performance of the software on MIPS-based platforms Show less

Lattice Semiconductor
Apr 2024 - nowStaff Machine Learn Engineer
Licenses & Certifications

Databricks Accredited Generative AI fundamentals
Databricks
CMI: Certificate of excellence for Leadership Accelerator Program (Level-5 Management and leadership program)
Imagination TechnologiesAug 2023
Deep Learning A-Z™ 2023: Neural Networks, AI & ChatGPT bonus
Udemy
Languages
- enEnglish
- hiHindi
- maMarathi
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