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SAIK KIN KOH

SAIK KIN KOH

Intern Analog Hardware Engineer

Followers of SAIK KIN KOH731 followers
location of SAIK KIN KOHPetaling Jaya, Selangor, Malaysia

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  • Timeline

  • About me

    Test Product Manager at NXP Semiconductor Malaysia (Freescale)

  • Education

    • Multimedia University

      2011 - 2014
      Bachelor's Degree Electrical and Electronics Engineering - First Class Honours List of Publications • Paper titled “Resistorless CMOS Bandgap Reference Circui

      Activities and Societies: Dean List 2010, 2011, 2012, 2013, 2014. Participant in Innovate Malaysia Design Competition 2014, Participant in Makeweekend Robotics 2014, Committee Member of ConvoFest'13 Multimedia University, Committee Member of 30Hour Farmine Camp 2012, Committee Member of Sector Focused Career Fair'12 Engineering 2012, National Service 2009 Research Title : Low Power CMOS Bandgap Reference (BGR) CircuitThe objective of the project is to design the low power CMOS Bandgap Reference (BGR) circuit using 0.18-µm technology. The design covers from the schematic design entry to layout design using Mentor Graphic EDA tool. The purpose of the BGR circuit is to yield a precise dc voltage which has minimum dependence on temperature and power supply variation. The project has proposed two different types of temperature-compensation… Show more Research Title : Low Power CMOS Bandgap Reference (BGR) CircuitThe objective of the project is to design the low power CMOS Bandgap Reference (BGR) circuit using 0.18-µm technology. The design covers from the schematic design entry to layout design using Mentor Graphic EDA tool. The purpose of the BGR circuit is to yield a precise dc voltage which has minimum dependence on temperature and power supply variation. The project has proposed two different types of temperature-compensation techniques which are the resistor-subdivision method and resistor-less method on the same circuit structure. Both techniques have successfully simulated the pre-layout and post-layout results at the corner analysis.The resistor-less BGR is preferable for the smaller silicon size and good temperature control whereas resistor-subdivision BGR is good with low power consumption. Show less

    • SEGi College

      2011 - 2012
      Foundation degree Physical Sciences 3.98 / 4.00

      Activities and Societies: First Class Honour , Dean List

  • Experience

    • National Instruments

      Jan 2014 - Jan 2014
      Intern Analog Hardware Engineer

      - Design DC-DC buck converter.- Design ATX power supply for controller. - Schematic and layout design using Mentor Graphic Expedition CAD tool.- R&D on circuit integration, efficiency, reliability.

    • NXP Semiconductors

      Dec 2014 - now

      Position as senior product test engineer in NXP semiconductor. Responsible to contribute as leaders to drive the department and project goal, as well as demonstrated my expertise technical and management skill to accomplish the projects within the timeline. - Manufacturing Final test lead on the MES migration project. (Solution development on end-to end processes, change management ) - Lead and support initial phase of new product introduction set up and release to production line. - Lead and introduce the first security automotive product set up and process standardization within department and manufacturing.- Work across functional department to delivery quality and product disposition to adopt the manufacturing output as well as customer demand.- Drive 1st pass and final yield improvement activities/project such as test program optimization & tester/loadboard test pogo pin analysis to improve the manufacturing product utilization.- Accountable of product ownership on various of technology such 0.18um, 55nm to continues improve the yield performance, TTR (test-time reduction) project, test parallelism, test flow removal etc.- Liaise across functional department such as wafer probe, front-end/back-end assembly to dissolve product issue though data analysis.- Involved and supporting the improvement of test program optimization such as DFT (scan, BIST test), open/short test, IDD (support current test), leakage test etc to ensure the well function of tested good unit prior ship to customer. - Pioneering of first security product launch in NXP ATKL by develop a control access/secure process on test program executing/testing. Show less

      • Product Test Manager

        Sept 2023 - now

      • Test Product Engineer

        Dec 2014 - now

  • Licenses & Certifications

  • Honors & Awards

    • Awarded to SAIK KIN KOH
      Bravo Award: Automotive Products OEE Improvement Through Soak Time Reduction - Aug 2017 -Improved manufacturing OEE of automotive product through the handler/machine soak time reduction.
    • Awarded to SAIK KIN KOH
      Bravo Award: Pioneering of security product launch - Aug 2017 - Lead and initial first security product launch in ATKL.- Develop a control access/ secure process on test program executing/testing.
    • Awarded to SAIK KIN KOH
      Bravo Award: C55 OTW Improvement - Feb 2017 - Improve the new C55 (55nm technology) product output .- Overall improve 25% of the C55 output.
    • Awarded to SAIK KIN KOH
      Bravo Award: Test2 J750 OEE Improvement - Feb 2017 -Contribute as a leader to drive the S12x 0.18um 100LQFP 1st pass yield and retest improvement. - Retest OEE improved 5% with total 0.5 tester saving.
    • Awarded to SAIK KIN KOH
      Bravo Award : J750 Platform Retest OEE Loss Reduction - Aug 2015 Driving as team member on manufacturing Retest OEE reduction to improve the productivity and effectiveness on manufacture resources utilization.
    • Awarded to SAIK KIN KOH
      Six-Sigma - 2015 - Six Sigma White Belt Six Sigma concepts and Problem Solving Frameworks.- Six Sigma Yellow Belt Methodology (Training)Intermediate Six sigma concepts, basic statistics, problem solving frameworks and specific problem solving tools.-Six Sigma Green Belt (completed training assessment).
    • Awarded to SAIK KIN KOH
      SCOred 2014 IEEE Student Research&Development Conference Conference Presentation 2014 Dec 2014 Paper Conference presentation on IEEE Student Research&Development 2014: Topic on Low Power BGR circuit design.
    • Awarded to SAIK KIN KOH
      List of Publications - • Paper titled “Resistorless CMOS Bandgap Reference Circuit” accepted by ISOCC 2014 under Analog and Mixed-Signal Techniques Topic.• S.K.Koh, L.Lee (2014). “Low Power CMOS Bandgap Reference Circuit”, IEEE Student Conference on Research and Development, 978-1-4799-6428-4/14/$31.00 ©2014 IEEE – (proceed for final presentation).