Tim Mansheim

Tim Mansheim

Product Management Intern

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location of Tim MansheimCedar Rapids, Iowa, United States

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  • Timeline

  • About me

    Engineering Manager at Skyworks Solutions, Inc.

  • Education

    • Purdue University

      2009 - 2010
      M.S. Electrical Engineering

      Activities and Societies: Eta Kapp Nu (HKN), the electrical engineering honor society

    • University of Iowa

      2004 - 2009
      B.S. Electrical Engineering

      Activities and Societies: Tau Beta Pi, Solar Bicycle Club, Circle K International, Engineering Connection Mentor

    • Arizona State University

      2011 - 2012
      Non-Degree Student Electrical and Electronics Engineering

      EEE523 Advanced Analog Design Fall 2011EEE547 Microwave Solid-State Circuit Design Fall 2012

  • Experience

    • Case New Holland

      May 2006 - Aug 2006
      Product Management Intern

      • Defined goals and requirements in the product definitions by communicating with multiple departments• Researched and organized competitors’ loader backhoe specifications with Excel and PowerPoint

    • MidAmerican Energy

      May 2007 - Aug 2007
      Substation Engineering Intern
    • Iowa Institute of Hydraulic Research (IIHR)

      Sept 2007 - Jul 2009
      Undergraduate Research Assistant
    • MRI Safety Research Group, Purdue University

      Sept 2009 - Feb 2011
      Graduate Research Assistant
    • Skyworks Solutions, Inc.

      Jan 2011 - now

      • Lead chip designer on Power Amplifier (PA) Si controllers for various programs for >4 years• Responsible for collecting specs for controller designs from product teams, interpreting register map controls from customers, and meeting the MIPI RF Front-End (RFFE) protocol• Designed top level schematics, created layout floorplans, developed simulation plans, instructed junior engineers and coops, documented results and held design reviews with product teams• Led effort between PA controller designers and other teams to increase serial data rate• Created many documents on “best practices” for teaching new hires and creating consistency in designs and procedures among designers • Led effort to port designs to a PDK from another foundry• Simulated and modified IP schematics such as bandgap, temperature compensation block, Voltage to Current circuit, Overvoltage Protection, LDO, current clamps, pad drivers, buffers, level shifter, fuse circuit, POR, ring oscillator, ESD clamps• Developed 4 Excel VBA macro tools used by analog designers throughout company for generating top level simulation files Show less

      • Engineering Manager

        Dec 2018 - now
      • Analog Design Engineer

        Aug 2011 - Dec 2018
      • Analog Circuit Design Intern

        Jan 2011 - Jul 2011
  • Licenses & Certifications

    • SKILL Language Programming Introduction vIC6.1.8 Exam

      Cadence Design Systems
      Aug 2022
      View certificate certificate