Sukhdeep Singh Oberoi

Sukhdeep Singh Oberoi

Intern

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location of Sukhdeep Singh OberoiHeidelberg, Baden-Wurtemberg, Alemania

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  • Timeline

  • About me

    Development Engineer at Sequid GmbH | M.Sc. in Electronics Engineering

  • Education

    • Savitribai Phule Pune University

      2016 - 2020
      Bachelor of Engineering - BE Electronics and Telecommunication Engineering
    • HSB Hochschule Bremen – City University of Applied Sciences

      2021 - 2023
      Master of Science - MS Electronics Engineering
    • St. Vincent's High School

      2004 - 2016
  • Experience

    • UL GROUP

      Jun 2019 - Jul 2019
      Intern

      Worked closely with the Service & Maintenance team for industrial communication protocols like ProfiBus and ProfiNet.

    • HSB Hochschule Bremen – City University of Applied Sciences

      Apr 2022 - Sept 2022
      Student Lab Assistant

      - Worked as a Lab Tutor for Master Students in the Fiber Optic Test and Measurement Laboratory in the Department of Electronics and Computer Science at the Hochschule Bremen. - Responsibilities included performing Lab experiments, scientific documentation of Lab-work, debugging errors and tutoring the students. - Domain of expertise: Optical Time Domain Reflectometry.

    • Energy & meteo systems GmbH | emsys VPP GmbH | emsys grid services GmbH

      Feb 2023 - Aug 2023
      Student Research Assistant

      - Extensively engaged with open-source tools like pandapower and PowSyBl for grid analysis and load-flow calculation of electrical grids. - Developed validation scripts for CGMES (Common Grid Model Exchange Standard) files, and worked on automating the validation process of the post load-flow analysis exported CGMES files, vital for ensuring the integrity of data exchange.

    • Sequid GmbH

      Feb 2023 - now

      - FPGA-based hardware design, particularly suited for high-speed data acquisition and processing. Continuous improvement and development of FPGA design for maximum throughput.- Complete embedded firmware development, ensuring seamless integration with hardware, primarily using Xilinx SoCs, and overseeing the commissioning process.- Design of adapter boards using CAD software tailored for high-speed interfacing applications. Master Thesis Topic:“Development of an FPGA-based Sampling Unit for a High Frequency Time Domain Reflectometer”.- Achieved a 128-fold increase in sampling and acquisition speed using Xilinx FPGAs. - Measurement and Signal Integrity analysis of PCB test coupons. - QA Testing of TDR software.

      • Development Engineer

        Feb 2024 - now
      • Master Thesis Student

        Aug 2023 - Jan 2024
      • Working Student

        Feb 2023 - Jul 2023
  • Licenses & Certifications

  • Volunteer Experience

    • Corporal

      Issued by National Cadet Corps on Jul 2011
      National Cadet CorpsAssociated with Sukhdeep Singh Oberoi
    • Teacher

      Issued by Odser Charitable Trust on Jan 2019
      Odser Charitable TrustAssociated with Sukhdeep Singh Oberoi