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Renê Timbó

Renê timbó

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location of Renê TimbóBelo Horizonte, Minas Gerais, Brazil
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  • Timeline

  • About me

    Lead RF Application Engineer at Cadence Design Systems

  • Education

    • Federal university of rio grande do sul

      2016 - 2019
      Master of science - ms microelectronics

      Thesis: A 130nm CMOS UHF Satellite receiver front-end for the Brazilian environmental data collecting System

    • Instituto militar de engenharia

      2006 - 2011
      Bachelor of engineering (b.eng.) electronics/telecommunications

      - Researches on lithography field at PUC-Rio semiconductor lab for three years Thesis: Sistematization of processing of semiconductors structures for infrared photodetectors manufacturing using optical lithography techniques, humid corrosion and metalization.Advisor: Luciene da Silva Demenicis

  • Experience

    • Oi

      Apr 2011 - Apr 2012
      Internship

      -Project management-Identification of innovative projects-Backoffice control-Benchmarking-SAP ERP software for project management

    • Dsw industrial e comercial ltda

      Dec 2012 - Jun 2013
      Manager

      - Sales for automotive sector (tires and lubrificant oils)- Backoffice control- New clients acquisition

    • Nscad microeletronica

      Jan 2013 - Apr 2020

      - Instructor of CI-BRASIL program for new analog RF/AMS trainees- Knowledge of EDA tools Virtuoso from Cadence, WicKeD from MunEDA and ADS from Keysight, HFSS from Ansys- Project of RF analog circuits (LNA's , mixers, VCO)- Project of analog amplifiers, voltage/current references, LDO, filters- Team leader- Responsible for a superheterodyne receiver project- Knowledge on XFAB 180nm technology- Knowledge on IBM 130nm technology- Knowledge on Silterra 130nm technology (layout only) - Knowledge on TSMC 65nm technology- Project of analog transceiver for satellite application (RX, TX and SX)- Analog backend- Signal integrity on ADS- EM simulation- Project of analog transceiver for ZigBee (RX, TX and SX)- FinFET (layout) Show less

      • RF IC Designer / Instructor at NSCAD Microeletronica

        Aug 2014 - Apr 2020

      • IC Designer/instructor

        Jan 2014 - Jan 2015

      • RF IC Designer/ Trainee at NSCAD Microeletronica

        Jul 2013 - Jul 2014

      • IC designer

        Jan 2013 - Jan 2014

    • Itt chip - unisinos

      Feb 2020 - Jan 2022
      Antenna engineer

      Antenna design on Ansys HFSS.Antenna design for SigFox, BLE, GPS, and NBIoT applicationsDesign of 3D models including transmission lines and matching networks with Johanson chip antennas at 2.4GHz and 900 MHz.HFSS 3D model and EM simulation of Helical(planar and traditional) antennas, patch antennas, inverted F antenna and meander line antenna.Measurement of antenna parameters (matching, Gain and irradiated power)

    • Cadence design systems

      Jan 2022 - now
      Lead. rf application engineer

  • Licenses & Certifications

    • Quantus transistor-level t1: overview and technology setup v19.1 exam

      Cadence design systems
      Dec 2019
      View certificate certificate

    • Quantus transistor-level t2: parasitic extraction v19.1 exam

      Cadence design systems
      Jan 2020
      View certificate certificate

    • Physical verification system v16.1 (ils)

      Cadence design systems
      Nov 2019

    • Spectre accelerated parallel simulator vspectre 17.1 (ils)

      Cadence design systems
      Oct 2019
      View certificate certificate

    • Virtuoso layout for advanced nodes: t1 place and route vicadv12.3 exam

      Cadence design systems
      Oct 2019
      View certificate certificate

    • Virtuoso layout for advanced nodes: t2 electromigration vicadv12.3 exam

      Cadence design systems
      Oct 2019
      View certificate certificate

    • Virtuoso layout design basics vic6.1.7 (ils)

      Cadence design systems
      Sept 2018
      View certificate certificate

    • Virtuoso layout for advanced nodes vicadv 12.2(ils)

      Cadence design systems
      Sept 2019
      View certificate certificate

    • Using virtuoso constraints effectively vic6.1.6 (ils)

      Cadence design systems
      Nov 2018
      View certificate certificate

    • Virtuoso system design platform vic6.1.7 isr19 (ils)

      Cadence design systems
      Dec 2019
      View certificate certificate