Dr. Manoj Pandey

Trainee (on a Project SoC for Microfluidic Pump)

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Ranchi, Jharkhand, India

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Timeline
About me
Associate Prof. Dept. of ECE, Sarala Birla University, Ranchi | 17 Years Exp. in Teaching, Research (Electronics & Communication Engineering, VLSI Design & FPGA's Embedded Systems)
Education
- Tezpur University
  2005 - 2007
  M.Tech
- Sant Longowal Institute of Engineering and Technology
  2009 - 2016
  Ph.D FPGA, Reconfigurable Computing Systems, Video/Image Processing
Experience
- CSIR-CEERI
  Jul 2006 - Jun 2007
  Trainee (on a Project SoC for Microfluidic Pump)
- Shobhit University
  Aug 2007 - Jul 2009
  Senior Lecturer (Switching Theory, Basic Electronics & VHDL)
- CSIR-CEERI
  Feb 2009 - Jan 2017
  Doctoral Student (FPGA's Reconfigurable Computing & Video Processing)
  PhD title: System Level Reconfigurable Techniques for Real Time Object Tracking.-Kernel based Mean Shift Algorithm-Xilinx FPGA Spartan 6 IVK Kit-Xilinx ISE & EDK-Used VDMA IP, Camera Interfacing, Microblaze Proceesor & Power PC-Hardware/Software Co-designingPartial & Dynamic Reconfiguration
- SRM University
  Jul 2009 - Sept 2010
  Assistant Professor (Digital System & VLSI Design)
- B K Birla Institute of Engineering & Technology, Pilani
  Sept 2010 - Oct 2021
  Taken the subjects: VLSI Design, Digital Systems, Mechatronics & Embedded Systems
  - Associate Prof. (VLSI Design & FPGA's Embedded Systems)
    Jul 2017 - Oct 2021
  - Assitant Prof. (VLSI Design & Embedded System)
    Sept 2010 - Jun 2017
- Sarala Birla University - SBU, Ranchi
  Apr 2022 - now
  - Associate Professor ECE-VLSI
    Oct 2021 - now
  - Director IQAC & Associate Prof ECE-VLSI
    Apr 2022 - Apr 2024
Licenses & Certifications
- VLSI Design Flow: RTL to GDS
  NPTEL
  Nov 2023
- Digital Circuits
  NPTEL
  Oct 2019
- CMOS Digital VLSI Design
  NPTEL
  Apr 2019