Sushmitha A.O

Experience

• 

  Tessolve

  Apr 2022 - now

  Started the carrier on Semiconductor at Tessolve semiconductor Private limited as An Intern.2years of experience in Digital signal product testing, Worked on SOC's, Processors, Power management devices and Integration team.Developing test program on ADVANTEST V93k for soc (system on chip) devices of 4nm and 5nm as well a characterization, yield analysis and test time Reduction, vector memory, HDMT and CMT tester.Test program integration in Sort level as well as Final testing level, Quality assurance testing & RMA rejects validation.Knowledge on ATE Architecture.Test platform:Verigy 93k smartest 8 & smartest 7HDMT & CMTExpertise:Silicon validation, debug & Integrator at Wafer level, Package level Testing and Quality assurance Testing.Test flows creation using Scripts.Test program development and debug tools.Test Time reduction, Vector memory optimization, Swaps analysis, Test program comparison.Final Test document preparation and presentation. Show less

  • Silicon Validation Engineer 2

    Oct 2024 - now

  • Silicon Validation Engineer 1

    Aug 2022 - now

  • Interns

    Apr 2022 - now