Herr Bert New

Experience

• 

  CG Computers Sdn Bhd

  Feb 2012 - Jul 2012

  Sales Assitant

  To aid customers with their inquiries and purchase of the products offered.To provide technical assistance to customers.To provide proper solutions needed by customers.

• 

  AIESEC

  Nov 2013 - Jun 2016

  Senior Executive AIESEC in Kedah-Perlis 2015/2016

  To bring change for the better in individuals who are in or out of the university by providing them a platform to develop themselves in the aspects of self-awareness,leadership,communication skills, and awareness towards worlds issues through an exchange program organization provides.

• 

  Altera

  Jun 2015 - Sept 2015

  IPD R&D Engineering Intern
• 

  Intel Corporation

  Aug 2016 - Aug 2024

  - Experienced in leading the successful development and deployment of multiple FPGA IP cores across various projects, ensuring on-time delivery and alignment with client requirements.- Experienced in working with High Speed Transceiver FPGA Interconnect IPs such as:Seriallite III, Seriallite IV, RapidIO, RapidIO II- Experienced in analyzing the requirements provided by stakeholders or clients to understand the functionality, performance, and interface specifications of the desired FPGA IP core.- Experienced in collaboration with cross-functional teams to gather and analyze requirements, translating them into efficient FPGA designs.- Experienced in designing, and implementing complex algorithms and interfaces using Verilog/VHDL, optimizing for performance and resource utilization.- Experienced in conducting thorough verification and testing, including developing comprehensive testbenches and performing simulation-based validation whilst using multiple simulator tools such as Questasim,VCS, VCSMX, Riviera, and Xcelium.- Experienced in synthesizing and implementing FPGA designs, meeting stringent timing constraints and delivering high-quality IP cores.- Experienced in integrating FPGA IP cores into system designs/example designs, whilst collaborating closely with architects and software engineers to ensure seamless functionality.- Experienced in generating detailed documentation including design specifications, user guides, and application notes, facilitating ease of integration and usage for customers.- Experienced in providing expert technical support and troubleshooting assistance to customers, resolving issues and optimizing IP core performance for various applications- Received recognition for outstanding performance, demonstrating dedication, innovation, and technical expertise in FPGA IP core development. Show less

  • FPGA IP Soft IP Development Engineer

    Jun 2017 - Aug 2024

  • Programmable IP Engineering R&D Graduate Trainee

    Aug 2016 - Jun 2017
• 

  Altera

  Jun 2024 - now

  Design Engineering Manager

  Leading a dynamic team in the development and management of advanced FPGA IPs. Managed IP's such as SerialLite, CPRI, Interlaken, and JESD204.