Basavaraj Naik

Basavaraj Naik

Lecturer

Followers of Basavaraj Naik1060 followers
location of Basavaraj NaikMetropolregion München

Connect with Basavaraj Naik to Send Message

Connect

Connect with Basavaraj Naik to Send Message

Connect
  • Timeline

  • About me

    Manager Socionext | Ex-Infineon Technologies | Ex-ST Microelectronics

  • Education

    • SJCE, Mysore

      -
      M. Tech. VLSI Design and Embedded System Distinction
    • Visvesvaraya Technological University

      -
      BE Electronics and Communication Engineering Distinction
  • Experience

    • KLE Dr.M.S.Sheshgiri College of Engineering & Technology

      Sept 2003 - Jun 2005
      Lecturer
    • National Semiconductor

      Aug 2006 - Jul 2007
      Intern

      Worked in AMS group at National Semiconductor, Bangalore.Involved in Class-2 Generation-1 RFID IP verification. My Master's thesis was "Comparision between Specman-E and SystemVerilog HVLs for building Test Benches"

    • ST Microelectronics

      Jul 2007 - Aug 2011
      Senior Design Engineer

      - DisplayPort (Digital Display Interface) Verification- Multi million gate DTV SoC Verification- Image processing Sub-system Verification- ST Bus based SoC Interconnect Verification.- Post silicon validation support for DTV SoC bring up and Firmware development.

    • Mirafra Technologies

      Sept 2011 - Oct 2012
      Member Technical Staff

      Client: Texas Instruments, Bangalore- MPEG Encoder/Decoder Control path Verification

    • Test and Verification Solutions

      Nov 2012 - May 2015
      Lead Verification Engineer

      Client: STMIcroelectronics, Catania, Italy - ARM ITCM Flash Interface eVC development - ST DMA Verification - Single Wire Protocol Verification - Digital Camera Interface VerificationClient: Lantiq, Singapore - Networking SoC (includes 802.11) Verification Client: Infineon Technologies, Munich - Automotive Micro-controller (includes ARM Cortex-M0) VerificationLead Internal team in developing SV UVM based VIP development (for standard protocols)EDA tool development for verification automation, verification analysis and management Show less

    • Infineon Technologies

      Jun 2015 - Aug 2024
      • Senior Manager Functional Verification Methodology & Services

        Jul 2022 - Aug 2024
      • Principal Engineer Functional Verification & Methodology

        Jun 2015 - Jul 2022
    • DVCon Europe 2024

      Apr 2024 - Oct 2024
      PC Member of Engineering Papers
    • Socionext Europe

      Sept 2024 - now
      Manager Hardware
  • Licenses & Certifications

    • Getting started with AI and Machine Learning

      LinkedIn