Nisha Joshi

Experience

• 

  Sir M Visvesvaraya Institute of Technology, Bangalore

  Aug 2005 - Jul 2009

  Undergraduate Project and Researcdh

  Undergraduate Computer Engg Project Work (Fuzzy logic and MATLAB)• Researched 24 grid power system of Indian southern hemisphere• Our team formulated and developed a program to control the under – voltage buses of the system• Development was based on MATLAB and fuzzy logic• Developed a rule – based and control action algorithm to improve voltage profile• Fuzzy concept was used to reduce computing time and to get a real time controlUndergraduate Research Work• Assisted professor for the design of AC Control Switches for Indian Railways• Made electrical drawings for transaction systems• Calculated switching time using the knowledge of Control systems and System and signals• Tabulated readings and verified against the data sheets for correctness Kevesebb megjelenítése

• 

  University of Illinois at Chicago

  Aug 2009 - Apr 2011

  Digital System Design Project • Designed and simulated a 16 bit 3 digit adder using divide and conquer and speculative method• Performed simulation using Quartus II• As a team we divided the theoretical, simulation and documenting.• The adder design was first made using basic components. The adder library was created and used for 3 digit additionVLSI Design Project • Designed and simulated a 4 bit universal shift register using Cadence• As a team we divided the theoretical, schematic, simulation, layout and end simulation• I implemented the schematic and performed LVS check• The aspect ratio was maintained so that we get an optimized design• We designed the Layout and performed DRC, LVS check and documented the time taken and area of the design with graphs plotted on SpectreAdvanced Computer Architecture Project • Implemented the blocking technique to improve performance of matrix transpose• Code snippet for blocking and without blocking technique was coded and simulated• The optimization technique improves temporal locality to reduce misses• The goal was to maximize access to data loaded into cache before the data is loadedAnalog/Mixed Signal Design Project • The NMOS and PMOS small and large signal models were simulated using Hspice• The sub circuit, main circuit, voltage source and voltage reference values are given• As a team we divided the theoretical, simulation and documentation• The Inverting and Non-Inverting Amplifiers, Differentiator, Integrator, High Band Pass filter and Low Band Pass filter small and large signal models were simulated using Hspice Kevesebb megjelenítése

  • Graduate Research Work

    Aug 2010 - Apr 2011

  • Graduate Projects

    Aug 2009 - Apr 2011
• 

  Indian Institute of Technology, Bombay

  May 2010 - Jul 2010

  VLSI design engineer Intern

  • Designed and analyzed a 1024 X 8 memory module for the ASIC System• Assembled row decoder, 6T SRAM cell, sense amplifier and read/write circuit• Communicated with Cadence support team to solve the compatibility issues of .oa files in NCSU library kit • Developed using Cadence 6.1 and NCSU 45nm libraries• Performed testing using DC analysis and trial/error• Received an honorarium on Memory Module at Indian Institute of Technology, Bombay

• 

  Intel Corporation

  Dec 2011 - now

  Summary• Engineering professional with hands on experience in backend flows for foundry customers and in developing QA automation with excellent performance review.• Resourceful Technical Program Manager skilled in streamlining operations and maintaining schedules for Foundry Kit deliverables.• Expertise in coordinating diverse teams and limited resources to complete objectives. Organized and detail-oriented with proactive and hard-working nature.Core Competencies • Extensive knowledge of ASIC design flows and IP block design.• Result oriented with strong analytical, problem solving, and communication skills.• Self-driven and has the ability to work independently as well as in a team environment.• PMP Certified:- PMP Certificate• Schedule planning• Collaborative methods • Knowledge of design and development Current Work Responsibilities• Excellent skills in establishing regression testing flows and verification plan development. • Strong expertise with industry-standard circuit design flow methodologies and verification tools• Expertise in Physical verification of designs using ICV and Mentor tools• Experience in various technologies - 14nm, 10nm• Driving workgroups with sub teams to drive the solution of issues found during QA like drc fixing, timing analysis• Wrote scripts in perl for post processing drcs reports, timing reports. Miscellaneous• Actively involved with scheduling team building activities for immediate group • Chandler Site representative for Women of ICF, where we are working on defining the groups objectives and networking strategies Kevesebb megjelenítése

  • Engineering Manager

    May 2020 - now

  • Component Design Engineer

    Dec 2011 - May 2020