Edwin Gnananadchtheram

Edwin Gnananadchtheram

Crew Member

Followers of Edwin Gnananadchtheram194 followers
location of Edwin GnananadchtheramCanada

Connect with Edwin Gnananadchtheram to Send Message

Connect

Connect with Edwin Gnananadchtheram to Send Message

Connect
  • Timeline

  • About me

    Senior Hardware Engineer at Untether AI

  • Education

    • Father Michael Goetz Catholic Secondary School

      2012 - 2016
      High School Diploma 90

      Activities and Societies: Concert Band, Varsity and Senior Soccer Team • High School Certificate for 4 years of Academic French• High School Honor Roll for all four years (80%+ average)

    • McMaster University

      2016 - 2021
      Bachelor's degree Electrical Engineering Co-op

      Final Year CoursesElectrical Power Systems - GPA: 4.0Power Electronics - GPA: 4.0Engineering Ethics and Law - GPA: 4.0Smart and Micro Grids - GPA: 4.0Embedded Systems - GPA: 4.0Electric Motor Drives - GPA: 4.0Principles of Nuclear Engineering - GPA: 3.7Digital System Design - GPA: 3.3Computer-Aided Engineering -GPA: 4.0Engineering Design - GPA: 4.0

  • Experience

    • Harveys Restaurant

      May 2017 - Sept 2018
      Crew Member

      • Assisted with training and development of new and current crew members• Achieved high customer satisfaction and maintained calm demeanor in a high-stress, fast-paced environment• Collaborated with crew members to ensure the delivery of efficient, high-quality service

    • Independent Electricity System Operator (IESO)

      Sept 2019 - Apr 2020
      Project Management Co-op

      • Used VBA programming to automate functions in MS Excel and Project, one of which helps visualize any inaccuracies or discrepancies of a project manager’s resource demand estimations to actuals• Performed presentations in team meetings and communicated with stakeholders to retrieve valuable information and updates to reflect project schedules • Communicated with stakeholders for requirements gathering, user story creation and process modelling

    • Untether AI

      Jul 2021 - now

      • Successfully taped out a chip and was responsible for the synthesis, static timing analysis, verilog design andpower analysis of multiple block level designs on the chip which are power and timing critical• Created and managed all design flows for synthesis and STA, including UPF for multi-voltage designs, timingconstraints, library setup and diagnosis, resolution and regression of reported problems, Errors/Warnings aswell as unexpected results/outputs• Highly involved in P&R (place and route) efforts with tools and flows like ICC2, CTS (clock tree synthesis),buffer insertion, ECO implementation• Power analysis using PrimePower and SPICE, creating command line scripts as well as using waveform viewersto analyze power and data signals to debug or improve design• Created Verilog/SystemVerilog HDL behavioural and structural code for multiple critical block level designson the chip and performed hierarchical layout based synthesis• Developed tests for fault detection during chip bringup and tested chips in the lab• Constantly collaborated and worked with different teams including RTL design team, CAD team and layoutengineers to continually improve and customize the design flow as well as produce the most optimal results• Provided innovative solutions to customize and improve quality and efficiency of mixed-signal design as well asto refine our design methodology as a startup company through scripts in TCL/Python and Makefiles Show less

      • Senior Hardware Engineer

        Jul 2023 - now
      • Hardware Engineer

        Jul 2021 - Jul 2023
  • Licenses & Certifications