Rishabh Mishra

Rishabh Mishra

Project Engineer

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location of Rishabh MishraDehradun, Uttarakhand, India

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  • Timeline

  • About me

    Engineer - STA @ Micron | M.Tech (Microelectronics) IIT-BHU | AIR 279-GATE'21 | ex-BEL

  • Education

    • G. B. Pant Engineering College, Pauri(Garhwal), Uttarakhand

      2013 - 2017
      BTech - Electronics & communication Engineering

      .

    • Indian Institute of Technology (Banaras Hindu University), Varanasi

      2021 - 2023
      M.Tech - Microelectronics (VLSI) 9.71

      GATE 2021: AIR 279

  • Experience

    • Bharat Electronics Limited

      Apr 2018 - Apr 2019
      Project Engineer
    • Micron Technology

      May 2022 - Jul 2022
      Intern- DEG Verification

      •Static Timing Analysis •Process automation of graph generation from the data in excel collected from weekly timing reports using Python scripting.

    • Micron Technology

      Jul 2023 - now
      Engineer (STA) - DEG/HBM Verification

      Working on STA and timing closure of core die in Memories, across multi PVT corners using PrimeTime. •Full chip and block level STA setup and timing closure of DDR and HBM memories. •Setting up design constraints (.sdc). •No_clock , Untested paths analysis and debug. •Worked on setup, hold, removal, recovery, Clock gating violations. •Setting up timing exceptions (multi cycle paths and false_paths).•Generated_clock constraints. •Generation of ECC patterns and worst case analysis in ECC Block. Show less

  • Licenses & Certifications

    • Basic Static Timing Analysis v2.0 Exam

      Cadence Design Systems
      Jun 2022
      View certificate certificate
    • C & C++

      Appin Technology Lab
  • Volunteer Experience

    • Mass awareness campagin against Cancer/Aids.

      Issued by Caring souls Foundation on May 2010
      Caring souls FoundationAssociated with Rishabh Mishra