
Disha Hegde
Analog Layout Intern

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About me
Software Engineer at Toshiba Software India Pvt.Ltd
Education

Drakshayani Kalyanshettar Public School
-10.0 CGPA.webp)
KLE Technological University - Hubballi (India)
2018 - 2022Bachelor of Engineering - BE Electronics and Communication Engineering 8.93 CGPA
Experience

Texas Instruments
Jan 2022 - Jun 2022Analog Layout Intern• Trained on Cadence Virtuoso Layout XL, Cadence Assura and Linux.• Gained an understanding of CMOS fabrication process.• Assisted in the layout of several standard cells.• Implemented basic level digital blocks and performed verification: LVS and DRC.• Gained an understanding of analog layout techniques like matching, LOD, STI and failure mechanisms like ESD, Electromigration and Latch up effect.• Implemented custom floor planning and performed routing for current mirrors, comparators and level shifter and performed verification using LVS and DRC. Show less

Toshiba
Jul 2022 - Apr 2024Software Engineer• Gained an understanding of NAND cells and Solid State Drives (SSD) architecture.• Managed the design and implementation of a test suite to validate frontend modules and the behavior of the NVMeManagement endpoint and NVMe Controller Management over interfaces such as SMBus for NVMe Data-Centric SSDs.• Conducted performance validation, regression testing, data integrity testing, implemented stress scenarios in GoogleTest framework and performed failure analysis to validate firmware stability. Show less
Licenses & Certifications
- View certificate

HTML, CSS, and Javascript for Web Developers
CourseraJun 2020 - View certificate

Image Processing with Python
CourseraJun 2020 - View certificate

Introduction to the Internet of Things and Embedded Systems
CourseraApr 2020
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